EcoCAR2 Training Resources
- Vehicle Architecture and Hardware Component Modeling
- Vehicle and Design Optimization
- Control Design and Simulation
- System and Component Testing and Validation
- Rapid Prototyping and Hardware-in-the Loop Testing
- Controller Implementation with Automatic Code Generation
System and Component Testing and Validation
As you develop your controller components and integrate them to form a system, it is important to have the confidence that each component is free of errors and that the entire system performs as expected. The goal is to identify design and requirements errors as early as possible when they are the easiest to fix. These errors can be uncovered using an environment that enables the engineer to perform iterative simulation, test, and analysis on both the component and the system.
It is common for the test engineer to manually develop test vectors to gain a better understanding of the design through simulation. Understanding how well you are testing your model through model coverage using Simulink Verification and Validation will help you identify whether you need additional test cases or if you have sections of your model which cannot be tested leading to a potential design error. Automatic test vector generation using Simulink Design Verifier provides reusable unit tests to satisfy model coverage and meet user-defined objectives.
Communicating your testing results is an important aspect and being able to do this effectively is imperative when working with engineers from different disciplines. Manually developing reports can be a tedious task that is often defined by a specific report format or testing process which lends itself to automation. Automatically generating reports using Simulink Report Generator to document your model and test results streamlines the ability to share your results with others and provides the documentation for archiving. Design tasks such as a software design failure mode and effects analysis can be performed much quicker through the use of simulation and automatic report generation.
System and Components Testing and Validation Tools
- Simulink Report Generator: Generate documentation for Simulink and Stateflow models
- Simulink Verification and Validation: Verify models and generated code
- Simulink Design Verifier: Generate tests and prove model properties using formal methods
- SystemTest: Manage tests and analyze results for system verification and validation
|Simulink Verification and Validation|
|Simulink Design Verifier|
|Simulink Report Generator|
- Best Practices for Verification and Validation (46:01)
- Integrating MATLAB Algorithms into System-Level Design Using Embedded MATLAB (63:01)