C281x Hardware Interrupt - Interrupt Service Routine to handle hardware interrupt -

Library

ccslinklib_c281x in Embedded IDE Link™ CC

Description

For many systems, an execution scheduling model based on a timer interrupt is not sufficient to ensure a real-time response to external events. The C281x Hardware Interrupt block addresses this problem by allowing for the asynchronous processing of interrupts triggered by events managed by other blocks in the C281x DSP Chip Support Library.

The following C281x blocks that can generate an interrupt for asynchronous processing are available from Target Support Package™ TC2

Only one Hardware Interrupt block can be used in a model. To handle multiple interrupts, place a Demux block at the output of the Hardware Interrupt block to direct function calls to the appropriate function-call subsystems.

Vectorized Output

The output of this block is a function call. The size of the function call line equals the number of interrupts the block is set to handle. Each interrupt is represented by four parameters shown on the dialog box of the block. These parameters are a set of four vectors of equal length. Each interrupt is represented by one element from each parameter (four elements total), one from the same position in each of these vectors.

Each interrupt is described by:

So one interrupt is described by a CPU interrupt number, a PIE interrupt number, a task priority, and a preemption flag.

The CPU and PIE interrupt numbers together uniquely specify a single interrupt for a single peripheral or peripheral module. The following table maps CPU and PIE interrupt numbers to these peripheral interrupts.

C281x Peripheral Interrupt Vector Values

 Row numbers = CPU values / Column numbers = PIE values
87654321
1 WAKEINT
(LPM/WD)
TINT0
(TIMER 0)
ADCINT
(ADC)
XINT2 XINT1Reserved PDPINTB
(EV-B)
PDPINTA
(EV-A)
2Reserved T1OFINT
(EV-A)
T1UFINT
(EV-A)
T1CINT
(EV-A)
T1PINT
(EV-A)
CMP3INT
(EV-A)
CMP2INT
(EV-A)
CMP1INT
(EV-A)
3 Reserved CAPINT3
(EV-A)
CAPINT2
(EV-A)
CAPINT1
(EV-A)
T2OFINT
(EV-A)
T2UFINT
(EV-A)
T2CINT
(EV-A)
T2PINT
(EV-A)
4 Reserved T3OFINT
(EV-B)
T3UFINT
(EV-B)
T3CINT
(EV-B)
T3PINT
(EV-B)
CMP6INT
(EV-B)
CMP5INT
(EV-B)
CMP4INT
(EV-B)
5Reserved CAPINT6
(EV-B)
CAPINT5
(EV-B)
CAPINT4
(EV-B)
T4OFINT
(EV-B)
T4UFINT
(EV-B)
T4CINT
(EV-B)
T4PINT
(EV-B)
6ReservedReserved MXINT
(McBSP)
MRINT
(McBSP)
ReservedReserved SPITXINTA
(SPI)
SPIRXINTA
(SPI)
7ReservedReservedReservedReservedReservedReservedReservedReserved
8ReservedReservedReservedReservedReservedReservedReservedReserved
9ReservedReserved ECAN1INT
(CAN)
ECAN0INT
(CAN)
SCITXINTB
(SCI-B)
SCIRXINTB
(SCI-B)
SCITXINTA
(SCI-A)
SCIRXINTA
(SCI-A)
10ReservedReservedReservedReservedReservedReservedReservedReserved
11ReservedReservedReservedReservedReservedReservedReservedReserved
12ReservedReservedReservedReservedReservedReservedReservedReserved

The task priority indicates the relative importance tasks associated with the asynchronous interrupts. If an interrupt triggers a higher-priority task while a lower-priority task is running, the execution of the lower-priority task will be suspended while the higher-priority task is executed. The lowest value represents the highest priority. Note that the default priority value of the base rate task is 40, so the priority value for each asynchronously triggered task must be less than 40 in order for these tasks to actually cause the suspension of the base rate task.

The preemption flag determines whether a given interrupt is preemptable or not. Preemption overrides prioritization, such that a preemptable task of higher priority can be preempted by a non-preemptable task of lower priority.

Dialog Box

CPU interrupt numbers

Enter a vector of CPU interrupt numbers for the interrupts you want to process asynchronously.

See the table of C281x Peripheral Interrupt Vector Values for a mapping of CPU interrupt number to interrupt names.

PIE interrupt numbers

Enter a vector of PIE interrupt numbers for the interrupts you want to process asynchronously.

See the table of C281x Peripheral Interrupt Vector Values for a mapping of CPU interrupt number to interrupt names.

Simulink task prioritys

Enter a vector of task priorities for the interrupts you want to process asynchronously.

See the discussion of this block's Vectorized Output for an explanation of task priorities.

Preemption flags

Enter a vector of preemption flags for the interrupts you want to process asynchronously.

See the discussion of this block's Vectorized Output for an explanation of preemption flags.

Enable simulation input

Select this check box if you want to be able to test asynchronous interrupt processing in the context of your Simulink® software model.

References

Detailed information interrupt processing is in TMS320x281x DSP System Control and Interrupts Reference Guide, Literature Number SPRU078C, available at the Texas Instruments™ Web site.

See Also

The following links to block reference pages require that Target Support Package TC2 is installed.

C281x SW Int Trigger,C281x Timer, Idle Task

  


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 © 1984-2008- The MathWorks, Inc.    -   Site Help   -   Patents   -   Trademarks   -   Privacy Policy   -   Preventing Piracy   -   RSS