Embedded IDE Link™ CC

reload - Reload most recent program file to target signal processor

Syntax

s = reload(cc,timeout)
s = reload(cc)

Description

s = reload(cc,timeout) resends the most recently loaded program file to the target processor. If you have not loaded a program file in the current session (so there is no previously loaded file), reload returns the null entry [] in s indicating that it could not load a file to the target. Otherwise, s contains the full path name to the program file. After you reset your target processor or after any event produces changes in your target processor memory, use reload to restore the program file to the target for execution.

To limit the time CCS IDE spends trying to reload the program file to the target, timeout specifies how long the load process can take. If the load process exceeds the time-out limit, CCS IDE stops trying to load the program file and returns an error stating that the time period expired. Exceeding the allotted time for the reload operation usually indicates that the reload was successful but CCS IDE did not receive confirmation before the time-out period passed.

s = reload(cc) reloads the most recent program file, using the timeout value set when you created link cc, the global time-out setting.

Using reload with Multiprocessor Boards

When your target board contains more than one processor, reload calls the reloading function for each processor represented by cc, reloading the most recently loaded program on each processor.

This is the same as calling reload for each processor individually through ticcs objects for each one.

Examples

After you create an object that connects to CCS, use the available methods to reload your most recently loaded project. If you have not loaded a project in this session, reload returns an error and an empty value for s. Loading a project eliminates the error.

cc=ticcs;
s=reload(cc,23)
Warning: No action taken - load a valid Program file before 
you reload...

s =

     ''

open(cc,'D:\ti\tutorial\sim62xx\gelsolid\hellodsp.pjt',... 
'project')

build(cc)

load(cc,'hellodsp.pjt')
halt(cc)
s=reload(cc,23)

s =

D:\ti\tutorial\sim62xx\gelsolid\Debug\hellodsp.out

See Also

cd, load, open

regwrite

remove