Communications Blockset™

General CRC Generator

Generate CRC bits according to generator polynomial and append to input data frames

Library

CRC sublibrary of Error Correction and Detection

Description

The General CRC Generator block generates cyclic redundancy code (CRC) bits for each input data frame and appends them to the frame. You specify the generator polynomial for the CRC algorithm using the Generator polynomial parameter. This block is general in the sense that the degree of the polynomial does not need to be a power of two. You represent the polynomial in one of these ways:

As a binary row vector containing the coefficients in descending order of powers. For example, [1 1 0 1] represents the polynomial x³+ x²+ 1.
As an integer row vector containing the powers of nonzero terms in the polynomial, in descending order. For example, [3 2 0] represents the polynomial x³+ x²+ 1.

You specify the initial state of the internal shift register by the Initial states parameter. The Initial states parameter is either a scalar or a binary row vector of length equal to the degree of the generator polynomial. A scalar value is expanded to a row vector of length equal to the degree of the generator polynomial. For example, the default initial state of [0] is expanded to a row vector of all zeros.

You specify the number of checksums that the block calculates for each input frame by the Checksums per frame parameter. The Checksums per frame value must evenly divide the size of the input frame. If the value of Checksums per frame is k, the block does the following:

Divides each input frame into k subframes of equal size
Prefixes the Initial states vector to each of the k subframes
Applies the CRC algorithm to each augmented subframe
Appends the resulting checksums at the end of each subframe
Outputs concatenated subframes

If the size of the input frame is m and the degree of the generator polynomial is r, the output frame has size m + k * r.

This block supports double and boolean data types. The output data type is inherited from the input.

Example

Suppose the size of the input frame is 10, the degree of the generator polynomial is 3, Initial states is [0], and Checksums per frame is 2. The block divides each input frame into two subframes of size 5 and appends a checksum of size 3 to each subframe, as shown below. The initial states are not shown in this example, because an initial state of [0] does not affect the output of the CRC algorithm. The output frame then has size 5 + 3 + 5 + 3 = 16.

Example of Cyclic Redundancy Check Encoding

This example clarifies the operation of the General CRC Generator block by comparing the generated CRC bits from the library block with those generated from primitive Simulink^® blocks. The model is located at: matlabroot/help/toolbox/commblks/commblks_examples/doc_crcgen.

For a known input message with a length of 6 bits, the model generates CRC bits for a generator polynomial, , and a specific initial state of the register.

You can experiment with different initial states by changing the value of Initial states prior to running the simulation. For all values, the comparison (generated CRC bits from the library block with those generated from primitive Simulink blocks) holds true.

Using the General CRC Generator block allows you to easily specify the generator polynomial (especially for higher order polynomials).

Signal Attributes

The General CRC Generator block has one input port and one output port. Both ports allow only frame-based binary column vectors.

Dialog Box

Generator polynomial: A binary or integer row vector specifying the generator polynomial, in descending order of powers.
Initial states: Binary scalar or a binary row vector of length equal to the degree of the generator polynomial, specifying the initial state of the internal shift register.
Checksums per frame: Positive integer specifying the number of checksums the block calculates for each input frame.

Algorithm

For a description of the CRC algorithm as implemented by this block, see Cyclic Redundancy Check Coding in Communications Blockset™ User's Guide.

Schematic of the CRC Implementation

The above circuit divides the polynomial by , and returns the remainder .

The input symbols are fed into the shift register one at a time in order of decreasing index. When the last symbol ( ) works its way out of the register (achieved by augmenting the message with r zeros), the register contains the coefficients of the remainder polynomial .