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MSK-Type Signal Timing Recovery - Recover symbol timing phase using fourth-order nonlinearity method

Library

Timing Phase Recovery sublibrary of Synchronization

Description

The MSK-Type Signal Timing Recovery block recovers the symbol timing phase of the input signal using a fourth-order nonlinearity method. This block implements a general non-data-aided feedback method that is independent of carrier phase recovery but requires prior compensation for the carrier frequency offset. This block is suitable for systems that use baseband minimum shift keying (MSK) modulation or Gaussian minimum shift keying (GMSK) modulation.

Inputs

By default, the block has one input port. The input signal could be (but is not required to be) the output of a receive filter that is matched to the transmitting pulse shape, or the output of a lowpass filter that limits the amount of noise entering this block.

The input must be a scalar or a frame-based column vector. The input uses N samples to represent each symbol, where N > 1 is the Samples per symbol parameter. If the input is frame-based, then its vector length is N*R, where R is a positive integer that indicates the number of symbols per frame. If the input is sample-based, then its sample time is 1/N times the underlying symbol period.

If the Reset parameter is set to On nonzero input via port, then the block has a second input port, labeled Rst. The Rst input determines when the timing estimation process restarts, and must be a scalar signal. The sample time of the Rst input equals the symbol period if the input signal is sample-based, and the frame period if the input signal is frame-based.

Outputs

The block has two output ports, labeled Sym and Ph:

Delays

This block incurs a delay of two symbols when the input signal is frame-based and three symbols when the input signal is sample-based.

Dialog Box

Modulation type

The type of modulation in the system. Choices are MSK and GMSK.

Samples per symbol

The number of samples, N, that represent each symbol in the input signal. This must be greater than 1.

Error update gain

A positive real number representing the step size that the block uses for updating successive phase estimates. Typically, this number is less than 1/N, which corresponds to a slowly varying phase.

Reset

Determines whether and under what circumstances the block restarts the phase estimation process. Choices are None, Every frame, and On nonzero input via port. The last option causes the block to have a second input port, labeled Rst.

Algorithm

This block's algorithm extracts timing information by passing the sampled baseband signal through a fourth-order nonlinearity followed by a digital differentiator whose output is smoothed to yield an error signal. The algorithm then uses the error signal to make the sampling adjustments.

More specifically, this block uses a timing error detector whose result for the kth symbol is e(k), given in [2] by

where

For more information about the role that e(k) plays in this block's algorithm, see Feedback Methods for Timing Phase Recovery in Communications Blockset User's Guide.

References

[1] D'Andrea, A. N., U. Mengali, and R. Reggiannini, "A Digital Approach to Clock Recovery in Generalized Minimum Shift Keying," IEEE Transactions on Vehicular Technology, Vol. 39, No. 3, August 1990, pp. 227-234.

[2] Mengali, Umberto and Aldo N. D'Andrea, Synchronization Techniques for Digital Receivers, New York, Plenum Press, 1997.

See Also

Early-Late Gate Timing Recovery, Squaring Timing Recovery

  


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