EDA Simulator Link™ DS

To VCD File - Generate value change dump (VCD) file

Library

EDA Simulator Link DS

Description

The To VCD File block generates a VCD file that contains information about changes to signals connected to the block's input ports and names the file with the specified file name. VCD files can be useful during design verification. Some examples of how you might apply VCD files include the following cases:

• For comparing results of multiple simulation runs, using the same or different simulator environments

• As input to post-simulation analysis tools

• For porting areas of an existing design to a new design

In addition, VCD files include data that can be graphically displayed or analyzed with postprocessing tools. Examples of postprocessing include the extraction of data pertaining to a particular section of a design hierarchy or data generated during a specific time interval.

Using the Block Parameters dialog box, you can specify the following:

• The file name to be used for the generated file

• The number of block input ports that are to receive signal data

• The timescale to relate Simulink sample times with HDL simulator ticks

VCD files can grow very large for larger designs or smaller designs with longer simulation runs. However, the size of a VCD file generated by the To VCD File block is limited only by the maximum number of signals (and symbols) supported, which is 94³ (830,584).

For a description of the VCD file format, see VCD File Format.

Note   The toVCD block is integrated into the Simulink Signal & Scope Manager. See the Simulink User's Guide for more information on using the Signal & Scope Manager.

Dialog Box

VCD file name

The file name to be used for the generated VCD file. If you specify a file name only, Simulink places the file in your current MATLAB directory. Specify a complete path name to place the generated file in a different location. If you specify the same name for multiple To VCD File blocks, Simulink automatically adds a numeric postfix to identify each instance uniquely.

Note   If you want the generated file to have a .vcd file type extension, you must specify it explicitly. Do not give the same file name to different VCD blocks. Doing so results in invalid VCD files.

Number of input ports

The number of block input ports on which signal data is to be collected. The block can handle up to 94³ (830,584) signals, each of which maps to a unique symbol in the VCD file.

In some cases, a single input port maps to multiple signals (and symbols). This occurs when the input port receives a multi-dimensional signal.

Because multi-dimensional signals are not part of the VCD specification, they are flattened to a 1D vector in the file.

Timescale

Choose an optimal timing relationship between Simulink and the HDL simulator.

The timescale options specify a correspondence between one second of Simulink time and some quantity of HDL simulator time. This quantity of HDL simulator time can be expressed in one of the following ways:

• In relative terms (i.e., as some number of HDL simulator ticks). In this case, the cosimulation is said to operate in relative timing mode. Relative timing mode is the default.

  To use relative mode, select Tick from the pop-up list at the label in the HDL simulator, and enter the desired number of ticks in the edit box at 1 second in Simulink corresponds to. The default value is 1 Tick.

• In absolute units (such as milliseconds or nanoseconds). In this case, the cosimulation is said to operate in absolute timing mode.

  To use absolute mode, select the desired resolution unit from the pop-up list at the label in the HDL simulator (available units are fs, ps, ns, us, ms, s ), and enter the desired number of resolution units in the edit box at 1 second in Simulink corresponds to. Then, set the value of the HDL simulator tick by selecting 1, 10, or 100 from the pop-up list at 1 HDL Tick is defined as and the resolution unit from the pop-up list at defined as.

VCD File Format

The format of generated VCD files adheres to IEEE Std 1364-2001. The following table describes the format.

Generated VCD File Format

$date
23-Sep-2003 14:38:11
$end

$version EDA Simulator Link™ DS version 
1.0 $ end

$timescale 1 ns $ end

$scope module manchestermodel $end

$var wire 1 ! Original Data [0] $end
$var wire 1 " Recovered Clock [0] $end
$var wire 1 # Recovered Data [0] $end
$var wire 1 $ Data Validity [0] $end

$upscope $end

$enddefinitions $end

#0

$dumpvars
 0!
 0"
 0#
 0$
$end

#630
 1!

.
.
.
#1160
 1#
 1$

$dumpoff
 x!
 x"
 x#
 x$
$end

HDL Cosimulation

EDA Simulator Link™ DS Machine Configuration Requirements