Contents

Index

• Using EDA Simulator Link with Cadence Incisive

• Using EDA Simulator Link with Mentor Graphics ModelSim

• Getting Started

• Simulating an HDL Component in a MATLAB Test Bench Environment

• Replacing an HDL Component with a MATLAB Component Function

• Simulating an HDL Component in a Simulink Test Bench Environment

Workflow for Simulating an HDL Component in a Simulink Test Bench Environment

• Overview to Using Simulink as a Test Bench

Understanding How the HDL Simulator and Simulink Software Communicate Using EDA Simulator Link

Introduction to the EDA Simulator Link HDL Cosimulation Block

• Create a Simulink Model for Test Bench Cosimulation with the HDL Simulator

Creating Your Simulink Model

Running and Testing a Hardware Model in Simulink

Adding a Value Change Dump (VCD) File (Optional)

• Code an HDL Component for Use with Simulink Test Bench Applications

Overview to Coding HDL Components for Use with Simulink

Specifying Port Direction Modes in the HDL Component

Specifying Port Data Types in the HDL Component

• Launch HDL Simulator for Test Bench Cosimulation with Simulink

Starting the HDL Simulator from MATLAB

Loading an Instance of an HDL Module for Cosimulation

Add the HDL Cosimulation Block to the Simulink Test Bench Model

• Define the HDL Cosimulation Block Interface (Simulink as Test Bench)

Accessing the HDL Cosimulation Block Interface

Mapping HDL Signals to Block Ports

Specifying the Signal Data Types

Configuring the Simulink and HDL Simulator Timing Relationship

Configuring the Communication Link in the HDL Cosimulation Block

Specifying Pre- and Post-Simulation Tcl Commands with HDL Cosimulation Block Parameters Dialog Box

Programmatically Controlling the Block Parameters

Start the HDL Simulation

• Run a Test Bench Cosimulation Session (Simulink as Test Bench)

Setting Simulink Software Configuration Parameters

Determining an Available Socket Port Number

Checking the Connection Status

Running and Testing a Cosimulation Model

Avoiding Race Conditions in HDL Simulation When Cosimulating With the EDA Simulator Link HDL Cosimulation Block

• Tutorial - Verifying an HDL Model Using Simulink, ModelSim, and the EDA Simulator Link Software

Tutorial Overview

Developing the VHDL Code

Compiling the VHDL File

Creating the Simulink Model

Setting Up ModelSim for Use with Simulink

Loading Instances of the VHDL Entity for Cosimulation with Simulink

Running the Simulation

Shutting Down the Simulation

• Replacing an HDL Component with a Simulink Algorithm

• Recording Simulink Signal State Transitions for Post-Processing

• Defining EDA Simulator Link M-Functions and Function Parameters

• Additional Deployment Options

• Advanced Operational Topics

• Using EDA Simulator Link with Synopsys Discovery

• Release Notes

Learn more about EDA Link Simulator

Simulating an HDL Component in a Simulink Test Bench Environment

Run MATLAB Component Simulation

Run MATLAB Component Simulation

Workflow for Simulating an HDL Component in a Simulink Test Bench Environment

Workflow for Simulating an HDL Component in a Simulink Test Bench Environment

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