Filter Design HDL Coder™

Testing with a Mentor Graphics^® ModelSim^® Tcl/Tk .do File

Overview

Note   The ModelSim .do file test bench type is deprecated in the current release and will not be supported in future releases. If you specify this option, a warning message is displayed.

This section describes how to generate a Mentor Graphics^® ModelSim^® Tcl/Tk .do file test bench, and use the Mentor Graphics ModelSim simulator to test and verify your filter design.

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Generating the Filter HDL Code and Test Bench .do File

Use the Filter Design HDL Coder™ GUI or command line interface to generate the HDL code for your filter design and test bench. The GUI generates a Mentor Graphics ModelSim .do file test bench if you select the ModelSim .do file option in the Test bench settings pane of the Generate HDL dialog box. You can specify a number of other test bench customizations, as described in Customizing the Test Bench.

The following figure shows settings for generating the filter and test bench files MyFilter.vhd and MyFilter_tb.do. The dialog box also specifies that the generated files are to be placed in the default target directory hdlsrc under the current working directory.

After you click Generate, the coder displays progress information similar to the following in the MATLAB^® Command Window:

### Starting VHDL code generation process for filter: Myfilter
### Generating: d:\work\MyPlayArea\hdlsrc\Myfilter.vhd
### Starting generation of Myfilter VHDL entity
### Starting generation of Myfilter VHDL architecture
### HDL latency is 2 samples
### Successful completion of VHDL code generation process for filter: Myfilter

### Starting generation of ModelSim .do file Test Bench
### Generating input stimulus
### Done generating input stimulus; length 3429 samples.
### Generating ModelSim .do file MyFilter_tb in: hdlsrc
### Done generating ModelSim .do file test bench.

Note   The length of the input stimulus samples varies from filter to filter. For example, the value 3429 in the preceding message sequence is not fixed; the value is dependent on the filter under test.

If you use the command line interface, you must

• Invoke the functions generatehdl and generatetb, in that order. The order is important because generatetb takes into account latency or numeric differences introduced into the filter's HDL code that results from the following property settings.

  Property...	Set to...	Can Affect...
  'AddInputRegister' or 'AddOutputRegister'	'on'	Latency
  'FIRAdderStyle'	'pipeline'	Numeric computations and latency
  'FIRAdderStyle'	'tree'	Numeric computations
  'OptimizeForHDL'	'off'	Numeric computations
  'CastBeforeSum'	'on'	Numeric computations
  'CoeffMultipliers'	'csd' or 'factored-csd'	Numeric computations

• Specify 'ModelSim' for the TbType parameter.

• Make sure the property settings specified in the invocation of generatetb match those of the corresponding invocation of generatehdl. You can do this in one of two ways:

  • Omit explicit property settings from the generatetb invocation. This function automatically inherits the property settings established in the generatehdl invocation.

  • Take care to specify the same property settings specified in the generatehdl invocation.

Also, consider using the function generatetbstimulus to return the test bench stimulus to the workspace.

For details on the property name and property value pairs that you can specify with the generatehdl and generatetb functions for customizing the output, see Properties Reference.

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Starting the Mentor Graphics^® ModelSim^® Simulator

After you generate your filter and test bench HDL files, start the Mentor Graphics ModelSim simulator. A screen display similar to the following appears.

After starting the simulator, set the current directory to the directory that contains your generated filter and test bench files.

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Compiling the Generated Filter File

Using your choice HDL compiler, compile the generated filter HDL file. The test bench .do file looks for your compiled HDL elements in a design library named work. The design library stores the compiled HDL components. If the design library work does not exist, you can create it by setting the current directory to hdlsrc and then issuing the command vlib work. Once the library exists, you can use the Mentor Graphics ModelSimcompiler to compile the filter's HDL file.

The following Mentor Graphics ModelSim command sequence changes the current directory to hdlsrc, creates the design library work, and compiles filter VHDL code.

cd hdlsrc
vlib work
vcom MyFilter.vhd

Caution   For VHDL test bench code that has floating-point (double) realizations, use a compiler that supports VHDL-93 or VHDL-02. For example, in the Mentor Graphics ModelSim simulator, specify the vcom command with the -93 option. Do not compile the generated test bench code with a VHDL-87 compiler. VHDL test benches using double- precision data types do not support VHDL-87, because test bench code uses the image attribute, which is available only in VHDL-93 or higher.

The following screen display shows this command sequence and informational messages displayed during compilation.

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Execute the .do File

After your filter's HDL file is compiled, execute the generated test bench .do file. The .do file

1. Loads the compiled filter for simulation.

2. Opens a wave window and populates it with filter signals.

3. Applies stimulus to filter signals with force commands.

4. Compares filter output to expected results.

You can execute the .do file by using the Mentor Graphics ModelSim do command or the Tcl source command. The following figure shows how to use the do command.

The test bench .do script displays the simulation results in a wave window that appears as follows.

Note   The test bench script adjusts the waveform such that it is appropriate for the specified filter output settings.

As your test bench simulation runs, watch for error messages. If any error messages appear, you must interpret them as they pertain to your filter design and the code generation options you applied. For example, a number of HDL customization options allow you to specify settings that can produce numeric results that differ from those produced by the original filter object. Expected and actual results are compared. If they differ, an error message similar to the following is returned:

Error in filter test: Expected xxxxxxxx Actual xxxxxxxx

Note   You cannot specify an error margin for .do file test benches like you can for HDL test benches. An error is returned if the expected and actual values do not match exactly.

You must determine whether the actual results are expected based on the customizations you specified when generating the filter HDL code.

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Testing with an HDL Test Bench

Properties Reference