Optimizing Coefficient Multipliers

By default, the coder produces code that includes coefficient multiplier operations. If necessary, you can optimize these operations such that they decrease the area used and maintain or increase clock speed. You do this by instructing the coder to replace multiplier operations with additions of partial products produced by canonical signed digit (CSD) or factored CSD techniques. These techniques minimize the number of addition operations required for constant multiplication by representing binary numbers with a minimum count of nonzero digits. The amount of optimization you can achieve is dependent on the binary representation of the coefficients used.

To optimize coefficient multipliers (for nonmultirate filter types),

  1. Select CSD or Factored-CSD from the Coefficient multipliers menu in the Filter settings pane of the Generate HDL dialog box.

  2. Consider setting an error margin for the generated test bench to account for numeric differences. The error margin is the number of least significant bits the test bench will ignore when comparing the results. To set an error margin,

    1. Click More Test Bench Settings in the Test bench settings pane of the Generate HDL dialog box. The More Test Bench Settings dialog box appears.

    2. Specify an integer in the Error margin (bits) field that indicates an acceptable minimum number of bits by which the numeric results can differ before the coder issues a warning.

    3. Click Apply to register the change or OK to register the change and close the dialog box.

  3. Continue setting other options or click Generate to initiate code generation.

Command Line Alternative: Use the generatehdl and generatetb functions with the property CoeffMultipliers to optimize coefficient multipliers with CSD techniques.

  


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