| Filter Design HDL Coder™ | |
Specify number of bits processed simultaneously in distributed arithmetic architecture
N
N specifies the number of bits processed simultaneously in a distributed arithmetic (DA) architecture. N must be
A nonzero positive integer that is a power of two
Such that mod(W, log2(N)) = 0 where W is the input word size of the filter.
The default value for N is 2, specifying processing of one bit at a time, or fully serial DA. The maximum value for N is 2^W, where W is the input word size of the filter. This maximum specifies fully parallel DA. Values of N between these extrema specify partly serial DA.
The DARadix property lets you introduce a degree of parallelism into the operation of DA, improving performance at the expense of area. See Distributed Arithmetic for FIR Filters for a complete description of DA.
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