PJFET - Model SPICE-compatible P-Channel JFET

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SPICE-Compatible Semiconductors

Description

The PJFET block represents a SPICE-compatible P-channel JFET.

The PJFET block model includes the following components:

Source-Gate Current-Voltage Model

The block provides the following relationship between the source-gate current Isg and the source-gate voltage Vsg after adjusting the applicable model parameters for temperature.

Applicable Range of Vsg ValuesCorresponding Isg Equation

Where:

Drain-Gate Current-Voltage Model

The block provides the following relationship between the drain-gate current Idg and the drain-gate voltage Vdg after adjusting the applicable model parameters for temperature.

Applicable Range of Vdg ValuesCorresponding Idg Equation

Source-Drain Current-Voltage Model

The block provides the following relationship between the source-drain current Isd and the source-drain voltage Vsd in normal mode (Vsd ≥ 0) after adjusting the applicable model parameters for temperature.

Applicable Range of Vsg and Vdg ValuesCorresponding Isd Equation

Where:

The block provides the following relationship between the source-drain current Isd and the source-drain voltage Vsd in inverse mode (Vsd < 0) after adjusting the applicable model parameters for temperature.

Applicable Range of Vsg and Vdg ValuesCorresponding Isd Equation

Junction Charge Model

The block provides the following relationship between the source-gate charge Qsg and the source-gate voltage Vsg after adjusting the applicable model parameters for temperature.

Applicable Range of Vsg ValuesCorresponding Qsg Equation

Where:

The block provides the following relationship between the drain-gate charge Qdg and the drain-gate voltage Vdg after adjusting the applicable model parameters for temperature.

Applicable Range of Vdg ValuesCorresponding Qdg Equation

Where:

Temperature Dependence

Several transistor parameters depend on temperature. There are two ways to specify the transistor temperature:

The block provides the following relationship between the saturation current IS and the transistor temperature T:

where:

The block provides the following relationship between the junction potential VJ and the transistor temperature T:

where:

The block provides the following relationship between the gate-source junction capacitance CGS and the transistor temperature T:

where:

The block uses the CGS(T) equation to calculate the gate-drain junction capacitance by substituting CGD (the Zero-bias GD capacitance, CGD parameter value) for CGS.

The block provides the following relationship between the forward and reverse beta and the transistor temperature T:

where β is the Transconductance, BETA parameter value.

Basic Assumptions and Limitations

The model is based on the following assumptions:

Dialog Box and Parameters

Main Tab

Device area, AREA

The transistor area. This value multiplies the Transconductance, BETA, Zero-bias GS capacitance, CGS, Zero-bias GD capacitance, CGD, and Saturation current, IS parameter values. It divides the Source resistance, RS and Drain resistance, RD parameter values. The default value is 1 m2. The value must be greater than 0.

Number of parallel devices, SCALE

The number of parallel transistors the block represents. This value multiplies the output current and device charges. The default value is 1. The value must be greater than 0.

Threshold voltage, VTO

The gate-source voltage above which the transistor produces a nonzero drain current. The default value is -2 V.

Transconductance, BETA

The derivative of drain current with respect to gate voltage. The default value is 1e-04 A/m2/V2. The value must be greater than or equal to 0.

Channel modulation, LAMBDA

The channel-length modulation. The default value is 0 1/V.

Saturation current, IS

The magnitude of the current that the ideal diode equation approaches asymptotically for very large reverse bias levels. The default value is 1e-14 A/m2. The value must be greater than or equal to 0.

Emission coefficient, ND

The transistor emission coefficient or ideality factor. The default value is 1. The value must be greater than 0.

Source resistance, RS

The transistor source resistance. The default value is 0 m2*Ω. The value must be greater than or equal to 0.

Drain resistance, RD

The transistor drain resistance. The default value is 0 m2*Ω. The value must be greater than or equal to 0.

Junction Capacitance Tab

Model junction capacitance

Select one of the following options for modeling the junction capacitance:

Zero-bias GS capacitance, CGS

The value of the capacitance placed between the gate and the source. This parameter is only visible when you select Yes for the Model junction capacitance parameter. The default value is 0 F/m2. The value must be greater than or equal to 0.

Zero-bias GD capacitance, CGD

The value of the capacitance placed between the gate and the drain. This parameter is only visible when you select Yes for the Model junction capacitance parameter. The default value is 0 F/m2. The value must be greater than or equal to 0.

Junction potential VJ

The junction potential. This parameter is only visible when you select Yes for the Model junction capacitance parameter. The default value is 1 V. The value must be greater than 0.01 V.

Grading coefficient, MG

The transistor grading coefficient. The default value is 0.5. The value must be greater than 0 and less than 0.9.

Capacitance coefficient FC

The fitting coefficient that quantifies the decrease of the depletion capacitance with applied voltage. This parameter is only visible when you select Yes for the Model junction capacitance parameter. The default value is 0.5. The value must be greater than or equal to 0 and less than or equal to 0.95.

Specify initial condition

Select one of the following options for specifying an initial condition:

Initial condition voltage ICVDS

Drain-source voltage at the start of the simulation. This parameter is only visible when you select Yes for the Model junction capacitance and Yes for the Specify initial condition parameter. The default value is 0 V.

Initial condition voltage ICVGS

Gate-source voltage at the start of the simulation. This parameter is only visible when you select Yes for the Model junction capacitance and Yes for the Specify initial condition parameter. The default value is 0 V.

Temperature Tab

Model temperature dependence using

Select one of the following options for modeling the diode temperature dependence:

Saturation current temperature exponent, XTI

The order of the exponential increase in the saturation current as temperature increases. The default value is 0. The value must be greater than or equal to 0.

Activation energy, EG

The energy gap that affects the increase in the saturation current as temperature increases. The default value is 1.11 eV. The value must be greater than 0.1 eVi.

Offset local circuit temperature, TOFFSET

The amount by which the transistor temperature differs from the circuit temperature. This parameter is only visible when you select Device temperature for the Model temperature dependence using parameter. The default value is 0 K.

Fixed circuit temperature, TFIXED

The temperature at which to simulate the transistor. This parameter is only visible when you select Fixed temperature for the Model temperature dependence using parameter. The default value is 300.15 K. The value must be greater than 0.

Parameter extraction temperature, TMEAS

The temperature at which the transistor parameters were measured. The default value is 300.15 K. The value must be greater than 0.

Ports

The block has the following ports:

G

Electrical conserving port associated with the transistor gate terminal.

D

Electrical conserving port associated with the transistor drain terminal.

S

Electrical conserving port associated with the transistor source terminal.

References

[1] G. Massobrio and P. Antognetti. Semiconductor Device Modeling with SPICE. 2nd Edition, McGraw-Hill, 1993. Chapter 3.

See Also

NJFET, P-Channel JFET

  


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