| Simulink® | |
Use the Simulink® Model Advisor checks to configure your model for simulation.
Consulting Model Advisor in the Simulink documentation.
Real-Time Workshop Model Advisor Check Reference in the Real-Time Workshop® documentation.
Simulink Verification and Validation Model Advisor Check Reference in the Simulink® Verification and Validation™ documentation.
Uses the slupdate command analysis mode to check for common upgrade issues.
Check blocks, settings, and references in the model for compatibility issues resulting from using a new version of Simulink software.
| Condition | Recommended Action |
|---|---|
| Referenced models recommended for update. | Run Simulink update tool, slupdate on the listed models. |
| Check library update status. | Verify that indicated libraries are valid. |
| Check update status for the Level 2 API S-functions. | Consider replacing Level 1 S-functions with Level 2. |
| Blocks have configuration sets or ports with undesired settings. | Run Simulink update tool, slupdate in update mode. |
slupdate in the Simulink documentation.
Writing S-Functions in the Simulink documentation.
Check for unconnected lines or ports.
This check lists unconnected lines or ports. These can have difficulty propagating signal attributes such as data type, sample time, and dimensions.
Note Ports connected to ground/terminator blocks will pass this test. |
| Condition | Recommended Action |
|---|---|
| Lines, input ports, or output ports are unconnected. | Ensure all signals are connected. Double-click the list of unconnected items to locate failure. |
Use the PortConnectivity command to obtain an array of structures describing block input or output ports.
Common Block Parameters in the Simulink documentation for information on the PortConnectivity command.
Check that root model Inport blocks fully define dimensions, sample time, and data type.
Using root model Inport blocks that do not fully define dimensions, sample time, or data type can lead to undesired simulation results. Simulink software back-propagates dimensions, sample times and data types from downstream blocks unless you explicitly assign them values.
| Condition | Recommended Action |
|---|---|
| Root-level Inport blocks have undefined attributes. | Fully define the attributes of all root-level Inport blocks. |
Working with Data Types in the Simulink documentation.
Determining Output Signal Dimensions in the Simulink documentation.
Specifying Sample Time in the Simulink documentation.
Unselected optimizations during code generation can lead to suboptimal results.
This check lists code generation optimizations that have been turned off. Turning them on can improve code efficiency and simulation time.
| Condition | Recommended Action |
|---|---|
| Listed optimizations not selected. | Turn on the listed optimizations in the Optimization pane Configurations Parameters dialog box. |
Checks if parameter tunability information is included in the Model Parameter Configuration dialog box.
Simulink software ignores tunability information specified in the Model Parameter Configuration dialog box. This check identifies those models containing parameter tunability information that Simulink software will ignore if the model is referenced by other models.
| Condition | Recommended Action |
|---|---|
| Model contains ignored parameter tunability information. | Click the links to convert to equivalent Simulink parameter objects in the MATLAB® workspace. |
Parameter Storage, Interfacing, and Tuning in the Simulink documentation.
Identify models that attempt to resolve named signals and states to Simulink.Signal objects.
Requiring Simulink software to resolve all named signals and states is inefficient and slows incremental code generation and model reference. This check identifies those signals and states for which you may turn off implicit signal resolution and enforce resolution.
| Condition | Recommended Action |
|---|---|
| Not all signals and states are resolved. | Turn off implicit signal resolution and enforce resolution for each signal and state that successfully resolves. |
Resolving Signal Objects for Output Data in the Simulink documentation.
Identify virtual buses that could be made nonvirtual. Making these buses nonvirtual improves generated code efficiency.
This check identifies blocks incorporating virtual buses that cross a model boundary. Changing these to nonvirtual improves generated code efficiency.
| Condition | Recommended Action |
|---|---|
| Blocks that specify a virtual bus crossing a model boundary. | Change the highlighted bus to nonvirtual. |
Working with Signals in the Simulink documentation.
Virtual and Nonvirtual Buses in the Simulink documentation.
Identify Discrete-Time Integrator blocks with state port and initial condition ports that are fed by neither an Initial Condition nor a Constant block.
Discrete-Time Integrator blocks with state port and initial condition ports might not be properly initialized unless they are fed from an Initial Condition or Constant block. This is more likely to happen when Discrete-Time Integrator blocks are used to model second-order or higher-order dynamic systems.
| Condition | Recommended Action |
|---|---|
| Discrete-Time Integrator blocks are not initialized during the model initialization phase. | Add a Constant or Initial Condition block to feed the external Initial Condition port. |
IC block
Integrator block
Constant block
Search model for disabled library links.
Disabled library links can cause unexpected simulation results. All disabled links should be resolved before a model is saved.
Note This check may overlap with Check model, local libraries, and referenced models for known upgrade issues. |
| Condition | Recommended Action |
|---|---|
| Library links are disabled. | Use Restore Link from the Link Options setting in the context menu. |
Use the Model Browser to find library links.
To enable a broken link, right-click a block in your model to display the context menu. Choose Link Options and click Restore Link.
The Model Browser in the Simulink documentation.
Search model for parameterized library links.
Parameterized library links that are unintentional can result in unexpected parameter settings in your model. This can result in improper model operation.
| Condition | Recommended Action |
|---|---|
| Parameterized links are listed. | Verify that all parameterized links are intended. |
Right-click a block in your model to display the context menu. Choose Link Options and click Go To Library Block to see the original block from the library.
To parameterize a library link, choose Look Under Mask, from the context menu and select the parameter.
Creating Block Masks in the Simulink documentation.
Search the model for unresolved library links, where the specified library block cannot be found.
Check for unresolved library links. Models do not simulate while there are unresolved library links.
| Condition | Recommended Action |
|---|---|
| Library links are unresolved. | Locate missing library block or an alternative. |
Fixing Unresolved Library Links
Identify Mux blocks used as a bus creator and any bus signal that is treated as a vector.
Models should not contain bus signals that Simulink software implicitly converts to vectors. Instead, either insert a Bus to Vector conversion block between the bus signal and the block input port that it feeds, or use the Simulink.BlockDiagram.addBusToVector command.
| Condition | Recommended Action |
|---|---|
| Identify signals used as vectors. | In the Configuration Parameters dialog box, set Mux blocks used to create bus signals to error. |
| Model uses buses properly. | In the Configuration Parameters dialog set Bus signal treated as vector to error. |
| Bus signals are implicitly converted to vectors. | Use Simulink.BlockDiagram.addBusToVector or insert a Bus to Vector block. |
The Bus to Vector conversion block is located in the Simulink/Signal Attributes library.
Bus to Vector block
Simulink.BlockDiagram.addBusToVector in the Simulink documentation.
Identify function-call return values that might be delayed because Simulink software inserted an implicit Signal Conversion block.
To ensure that signals reside in contiguous memory, Simulink software can automatically insert an implicit Signal Conversion block in front of function-call initiator block input ports. This can result in a one-step delay in returning signal values from calling function-call subsystems. The delay can be avoided by ensuring the signal originates from a signal block within the function-call system. Or, if the delay is acceptable, insert a Unit Delay block in front of the affected input ports.
| Condition | Recommended Action |
|---|---|
| The listed block input ports could have an implicit Signal Conversion block. | Decide if a one-step delay in returning signal values is acceptable
for the listed signals.
|
Signal Conversion block
Unit Delay block
Find continuous sample time, non-floating-point output signals.
Non-floating-point signals cannot properly represent continuous variables.
| Condition | Recommended Action |
|---|---|
| Signals with continuous sample times have a non-floating-point data type. | On the identified signals, either change the sample time to be discrete or fixed-in-minor-step ([0 1]). |
Modeling and Simulating Discrete Systems in the Simulink documentation.
Analyze Merge blocks in the same tree as a group, and determine the possibility for them to execute at the same time step.
Blocks that directly drive the same tree of Merge blocks should have mutually exclusive execution in each time step. This check identifies those blocks that drive the same tree of Merge blocks, and so are likely to execute at the same time step.
Provide a maximum analysis time to execute the check.
| Condition | Recommended Action |
|---|---|
| Merge blocks can be interconnected to form a tree structure. | Rework your model so that no blocks drive the same tree of Merge blocks. |
Merge block
| Model Advisor Checks |
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