| Simulink® | |
Model Verification
The Check Input Resolution block checks whether the input signal has a specified scalar or vector resolution (see Resolution). If the resolution is a scalar, the input signal must be a multiple of the resolution within a 10e-3 tolerance. If the resolution is a vector, the input signal must equal an element of the resolution vector. If the verification condition is true, the block does nothing. If not, the block halts the simulation, by default, and displays an error message.
The Check Input Resolution block and its companion blocks in the Model Verification library are intended to facilitate creation of self-validating models. For example, you can use model verification blocks to test that signals do not exceed specified limits during simulation. When you are satisfied that a model is correct, you can turn error checking off by disabling the verification blocks. You do not have to physically remove them from the model. If you need to modify a model, you can temporarily turn the verification blocks back on to ensure that your changes do not break the model.
The Check Input Resolution block accepts input signals of data type double and of any dimension. If the input signal is nonscalar, the block checks the resolution of each element of the input test signal.
For a discussion on the data types supported by Simulink® software, see Data Types Supported by Simulink®.
Resolution that the input signal must have.
Unchecking this option disables the Check Input Resolution block, that is, causes the model to behave as if the block did not exist. The Model Verification block enabling setting under Debugging on the Data Validity diagnostics pane of the Configuration Parameters dialog box allows you to enable or disable all model verification blocks in a model, including Check Input Resolution blocks, regardless of the setting of this option.
An M-expression to be evaluated when the assertion fails.
If checked, this option causes the Check Input Resolution block to halt the simulation when the block's output is zero and display an error message in the Simulation Diagnostics viewer. Otherwise, the block displays a warning message in the MATLAB® Command Window and continues the simulation.
If checked, this option causes the Check Input Resolution block to output a Boolean signal that is true (1) at each time step if the assertion succeeds and false (0) if the assertion fails. The data type of the output signal is Boolean if you have selected the Implement logic signals as boolean data option on the Simulation and code generation optimization pane of the Configuration Parameters dialog box. Otherwise the data type of the output signal is double.
Direct Feedthrough | No |
Sample Time | Inherited from driving block |
Scalar Expansion | No |
Dimensionalized | Yes |
Zero Crossing | No |
| Check Dynamic Upper Bound | Check Static Gap | |
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