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Unit Delay Enabled Resettable External IC - Delay signal one sample period, if external enable signal is on, with external Boolean reset and initial condition

Library

Additional Math & Discrete / Additional Discrete

Description

The Unit Delay Enabled Resettable External IC block combines the features of the Unit Delay Enabled, Unit Delay External IC, and Unit Delay Resettable blocks.

The block can reset its state based on an external reset signal R. When the enable signal E is on and the reset signal R is false, the block outputs the input signal delayed by one sample period.

When the enable signal E is on and the reset signal R is true, the block resets the current state to the initial condition given by the signal IC, and outputs that state delayed by one sample period.

When the enable signal is off, the block is disabled, and the state and output do not change except for resets. The enable signal is on when E is not 0, and off when E is 0.

You specify the time between samples with the Sample time parameter. A setting of -1 means that the block inherits the Sample time.

Data Type Support

The Unit Delay Enabled Resettable External IC block accepts signals of the following data types:

Floating point
Built-in integer
Fixed point
Boolean

The data types of the inputs u and IC must be the same. The output has the same data type as u and IC.

For more information, see Data Types Supported by Simulink in the Simulink documentation.

Parameters and Dialog Box

Sample time: Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See How to Specify the Sample Time in the online documentation for more information.

Characteristics

Direct Feedthrough	No, of the input port No, of the enable port Yes, of the enable port Yes, of the external `IC` port
Sample Time	Specified in the Sample time parameter
Scalar Expansion	Yes
Zero-Crossing Detection	No