| Simulink® | |
Delay signal one sample period, with external Boolean reset and initial condition
Additional Math & Discrete / Additional Discrete
The Unit Delay Resettable External IC block delays a signal one sample period.
The block can reset its state based on an external reset signal R. The block has two input ports, one for the input signal u and the other for the reset signal R. When the reset signal is false, the block outputs the input signal delayed by one time step. When the reset signal is true, the block resets the current state to the initial condition given by the signal IC and outputs that state delayed by one time step.
The input u and initial condition IC must be the same data type, but can be any data type. The output is the same data type as the inputs u and IC. The reset R can be any data type.
You specify the time between samples with the Sample time parameter. A setting of -1 means the Sample time is inherited.
The Unit Delay Resettable External IC block accepts signals of any data type supported by Simulink® software, including fixed-point data types.
Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See Specifying Sample Time in the online documentation for more information.
Direct Feedthrough | No, of the input port Yes, of the reset port Yes, of the external IC port |
Sample Time | Specified in the Sample time parameter |
Scalar Expansion | Yes |
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| Unit Delay Resettable | Unit Delay With Preview Enabled | |
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