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A bus is a composite signal that is implemented as a hierarchical structure. The components of a bus can have different attributes and can themselves be composite signals (buses or muxes). Bus signals can be virtual or nonvirtual; see Virtual and Nonvirtual Buses for details. The Signal Routing library provides three blocks that you can use for implementing buses:
Create a bus that contains specified elements
Replace specified bus elements.
Select elements from a bus.
Each of these blocks is virtual or nonvirtual depending on whether the bus it processes is virtual or nonvirtual. The Simulink® software chooses the block type, and changes it automatically if the bus type changes.
To create and access a bus signal with default properties:
Clone a Bus Creator and Bus Selector block from the Signal Routing library.
Connect the Bus Creator, Bus Selector, and other blocks as needed to implement the desired composite signal.
The next figure shows two signals that are input to a Bus Creator block, transmitted as a bus signal to a Bus Selector block, and output as separate signals.

The Bus Creator and Bus Selector blocks are the left and right vertical bars, respectively. Consistent with the goal of reducing visual complexity, neither block displays a name. The line connecting the blocks, representing the bus signal, is tripled because the model has been built, and the middle line is solid because the bus is virtual. The line would be dashed if the bus were nonvirtual:
| Virtual Bus |
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| Nonvirtual Bus |
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See Signal Line Styles for more about the graphical appearance of signals. You can also display other signal characteristics graphically, as described under Displaying Signal Properties. For more information about creating and accessing buses, see the reference documentation for the Bus Creator, Bus Selector, and Bus Assignment blocks.
Buses can be nested to any depth. The Simulink software automatically handles most of the complexities involved. For example, the next figure shows six signals nested into two buses, which are nested into one, followed by separation into two buses and then into six separate signals:

The six signals retain their separate identities just as if no bus creation and selection occurred, as shown by the Display and Scope blocks.

Specifying nonvirtual buses, like those in the previous figure, requires only cloning blocks, setting parameters, and connecting signals. Bus Creator and Bus Selector blocks have two ports by default. See the Bus Creator and Bus Selector block documentation for information about how to specify buses of different widths.
A bus-capable block is a block through which both virtual and nonvirtual buses can propagate. All virtual blocks are bus-capable. The following nonvirtual blocks are also bus-capable:
Some bus-capable blocks impose constraints on bus propagation through them. See the documentation for the blocks in Blocks-Alphabetical List for more information.
The ability to include a bus as an element of another bus creates the possibility of a loop of Bus Creator blocks, Bus Selector blocks, and bus-capable blocks that inadvertently includes a bus as an element of itself. The resulting circular definition cannot be resolved and therefore causes an error.
The error message that appears specifies the location at which the Simulink software determined that the circular structure exists. The error is not really at any one location: the structure as a whole is in error. Nonetheless, the location cited in the error message can be useful for beginning to trace the definition cycle, the structure of which may not be obvious on visual inspection.
Begin by selecting a signal line associated with the location cited in the error message.
Choose Highlight to Source or Highlight to Destination from the signal's Context menu. (See Displaying Signal Sources and Destinations for more information.)
Continue choosing signals and highlighting their sources and destinations until the cycle becomes clear.
Restructure the model as needed to eliminate the circular bus definition.
Because the problem is a circular definition rather than a circular computation, the cycle cannot be broken by inserting additional blocks, in the way that an algebraic loop can be broken by inserting a Unit Delay block. No alternative exists but to restructure the model to eliminate the circular bus definition.
![]() | Using Muxes | Using Bus Objects | ![]() |
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