Nesting Buses

Buses can be nested to any depth. The Simulink software automatically handles most of the complexities involved. For example, the next figure shows six signals nested into two buses, which are nested into one, followed by separation into two buses and then into six separate signals:

The six signals retain their separate identities just as if no bus creation and selection occurred, as shown by the Display and Scope blocks:

Specifying nonvirtual buses, like those in the previous figure, requires only cloning blocks, setting parameters, and connecting signals. Bus Creator and Bus Selector blocks have two ports by default. See the Bus Creator and Bus Selector block documentation for information about how to specify buses of different widths.

Circular Bus Definitions

The ability to nest a bus as an element of another bus creates the possibility of a loop of Bus Creator blocks, Bus Selector blocks, and bus-capable blocks that inadvertently includes a bus as an element of itself. The resulting circular definition cannot be resolved and therefore causes an error.

The error message that appears specifies the location at which the Simulink software determined that the circular structure exists. The error is not really at any one location: the structure as a whole is in error. Nonetheless, the location cited in the error message can be useful for beginning to trace the definition cycle; its structure may not be obvious on visual inspection.

1. Begin by selecting a signal line associated with the location cited in the error message.

2. Choose Highlight to Source or Highlight to Destination from the signal's Context menu. (See Displaying Signal Sources and Destinations for more information.)

3. Continue choosing signals and highlighting their sources and destinations until the cycle becomes clear.

4. Restructure the model as needed to eliminate the circular bus definition.

Because the problem is a circular definition rather than a circular computation, the cycle cannot be broken by inserting additional blocks, in the way that an algebraic loop can be broken by inserting a Unit Delay block. No alternative exists but to restructure the model to eliminate the circular bus definition.

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Creating and Accessing a Bus

Bus-Capable Blocks

Related Products & Applications

• Simulink
• Control Design
• Signal Processing & Communications
• Model-Based Design
• Physical Modeling
• Verification & Validation

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