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This table summarizes what's new in V1.4 (R2009a):
| New Features and Changes | Version Compatibility Considerations | Fixed Bugs and Known Problems | Related Documentation at Web Site |
|---|---|---|---|
| Yes Details below | No | Bug Reports | Printable Release Notes: PDF |
New features and changes introduced in this version are:
Analyzing External M-Files for Embedded MATLAB Function Blocks
Enhanced Block Replacement Capability for Subsystems and Model Blocks
Automatic stubbing allows you to complete a test-generation or property-proving analysis even if the model contains blocks or functions that the Simulink Design Verifier software does not support, like S-functions and C math operations.
By default, this feature is unavailable. To enable automatic stubbing before running an analysis, on the Configuration Parameters Design Verifier main pane, select Automatic stubbing of unsupported blocks and functions. In addition, if the compatibility check finds unsupported blocks that automatic stubbing can handle, you can enable automatic stubbing at that time.
Long test cases is a new option for the Test suite optimization parameter. The Long test cases option instructs the Simulink Design Verifier software to create fewer but longer test cases that each satisfy multiple test objectives. With this option, you can customize the analysis results, run a more efficient analysis, and create easier-to-review results, in both Signal Builder and in the HTML report that the software generates.
The Simulink Design Verifier software now supports models containing the following blocks:
Combinatorial Logic
Decrement Time To Zero
Discrete Filter
Fixed-Point State-Space
Integer Delay
Model blocks that reference other models
Prelookup
Relay
If your model contains an Embedded MATLAB Function block that calls any external M-files, the Simulink Design Verifier software can now accumulate coverage results for those M-files.
You can write your own replacement rules to replace subsystem or Model blocks that reference another model with theSimulink Design Verifier block replacement capability. The software replaces a subsystem or Model block with a different subsystem or with a built-in block as defined in the block replacement rules.
The new Implies block simplifies property specification. You can now specify conditions that produce a given response. For example, you can quickly create expressions indicating that pressing the break pedal implies the cruise control must be inactive.
You can use the Implies block in any model, not just when running the Simulink Design Verifier software.
The Simulink Design Verifier block library includes four new example models that demonstrate how to define complex properties for property-proving analysis.
In addition, the following demo models are shipping with R2009a:
sldvdemo_sbr_design.mdl — Finding property violations
sldvdemo_sbr_verification.mdl — Proving that properties are valid
sldvdemo_thrustrvs_verification.mdl — Analyzing model and properties to prove correctness or to identify counterexamples
sldvdemo_cruise_control_fxp_verification.mdl — Proving properties for fixed-point arithmetic with block replacements
sldvdemo_cruise_control_verification.mdl — Supporting model reference and verification subsystems
The sldvisactive function checks whether the Simulink Design Verifier software is actively translating the model. This function is called from the masked initialization of masked subsystems and other model or block callbacks to configure the model, as needed, for Simulink Design Verifier analysis.
For example, the mask initialization of the Environment Controller block invokes the sldvisactive function to output the signal at its Sim port when you start analyzing a model that contains the block.
![]() | Version 1.5 (R2009b) Simulink Design Verifier Software | Version 1.3 (R2008b) Simulink Design Verifier Software | ![]() |

Learn more about Simulink through this collection of videos, articles, technical literature and the Getting Started with Simulink Guide.
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