Learn more about Simulink Design Verifier

sldvisactive - Check if Simulink Design Verifier software is analyzing model

Syntax

status = sldvisactive
status = sldvisactive(model)
status = sldvisactive(block)

Description

status = sldvisactive checks if the Simulink Design Verifier software is actively analyzing the current Simulink model. If the operation is successful, sldvisactive returns 1. Otherwise, it returns 0.

status = sldvisactive(model) checks if the Simulink Design Verifier software is actively analyzing model.

status = sldvisactive(block) checks if the Simulink Design Verifier software is actively analyzing the model that contains block.

sldvisactive customizes the model analysis in block and model callback functions, or mask initialization.

Examples

Eliminate blocks that are incompatible with the Simulink Design Verifier software:

1. Create a Simulink model and save it as mEnvControl.

   

2. Right-click the Environment Controller block and select View Mask.

3. Click the Initialization tab and add the following command, if it does not exist:

   switch_mode = rtwenvironmentmode(bdroot(gcbh)) || ...
       (exist('sldvisactive','file')~=0 && ...
       sldvisactive(bdroot(gcbh)));

   The Simulink Design Verifier software does not support Band-Limited White Noise blocks. If the software is analyzing the mEnvControl model the mask initialization of the Environment Controller block:

   • Sets the pass-through mode to pass the Sim signal to the output port.

   • Eliminates the RTW port, which is incompatible with the Simulink Design Verifier software.

sldvharnessmerge

sldvmakeharness

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