Configuring Multirate Models for HDL Code Generation

On this page…
Overview Configuring Model Parameters Configuring Sample Rates in the Model Constraints for Rate Transition Blocks and Other Blocks in Multirate Models

Overview

Certain requirements and restrictions apply to multirate models that are intended for HDL code generation. This section provides guidelines on how to configure model and block parameters to meet these requirements.

Back to Top

Configuring Model Parameters

Before generating HDL code, configure the parameters of your model using the hdlsetup command. This ensures that your multirate model is set up correctly for HDL code generation. This section summarizes settings applied to the model by hdlsetup that are relevant to multirate code generation. These include:

• Solver options that are recommended or required for HDL code generation:

  • Type: Fixed-step.

  • Solver: Discrete (no continuous states). Other fixed-step solvers could be selected, but this option is usually correct for simulating discrete systems.

  • Tasking mode: Must be explicitly set to SingleTasking. Do not set Tasking mode to Auto.

• hdlsetup configures the following Diagnostics / Sample time options for all models:

  • Multitask rate transition: error

  • Single task rate transition: error

  In multirate models intended for HDL code generation, Rate Transition blocks must be explicitly inserted when blocks running at different rates are connected. Setting Multitask rate transition and Single task rate transition to error ensures that any illegal rate transitions are detected before code is generated.

Back to Top

Configuring Sample Rates in the Model

The coder requires that at least one valid sample rate (sample time > 0) must exist in the model. If all rates are 0, –1, or –2, the code generator (makehdl) and compatibility checker (checkhdl) terminates with an error message.

Back to Top

Constraints for Rate Transition Blocks and Other Blocks in Multirate Models

This section describes constraints you should observe when configuring Rate Transition, Upsample, Downsample, Zero-Order Hold, and various types of delay blocks in multirate models intended for HDL code generation.

Rate Transition Blocks

Rate Transition blocks must be explicitly inserted into the signal path when blocks running at different rates are connected. For general information about the Rate Transition block, see the Rate Transition block documentation.

Make sure the data transfer properties for Rate Transition blocks are set as follows:

• Ensure deterministic data transfer: Selected.

• Ensure data integrity during data transfer: Selected.

Upsample

When configuring Upsample blocks, set Frame based mode to Maintain input frame size.

When the Upsample block is in this mode, Initial conditions has no effect on generated code.

Downsample

Configure Downsample blocks as follows:

• Set Frame based mode to Maintain input frame size.

• Set Sample based mode to Allow multirate.

Given these Downsample block settings, Initial conditions has no effect on generated code if Sample offset is set to 0.

Delay and Zero-Order Hold Blocks

Use Rate Transition blocks, rather than any of the following block types, to create rate transitions in models intended for HDL code generation:

• Unit Delay

• Unit Delay Enabled

• Integer Delay

• Tapped Delay

• Zero-Order Hold

All types of Delay blocks listed should be configured to have the same input and output sample rates.

Zero-Order Hold blocks must be configured with inherited (–1) sample times.

Back to Top

Overview of Multirate Models

Example: Model with a Multirate DUT

© 1984-2009- The MathWorks, Inc.    -   Site Help   -   Patents   -   Trademarks   -   Privacy Policy   -   Preventing Piracy   -   RSS