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| Documentation → Simulink HDL Coder |
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| Documentation → Simulink HDL Coder |
| Contents | Index |
Function Reference |  Alphabetical List |
| makehdl | Generate HDL RTL code from model or subsystem |
| makehdltb | Generate HDL test bench from model |
| checkhdl | Check subsystem or model for HDL code generation compatibility |
| hdllib | Create library of blocks that support HDL code generation |
| hdlnewblackbox | Generate customizable control file from selected subsystem or blocks |
| hdlsetup | Set model parameters for HDL code generation |
| hdlnewcontrol | Construct a code generation control object for use in a control file |
| hdlnewcontrolfile | Generate customizable control file from selected subsystem or blocks |
| hdlnewforeach | Generate forEach calls for insertion into code generation control files |
 | VHDLFileExtension | Functions — Alphabetical List |  |
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