| Target Support Package™ TC2 | |
c280xdspchiplib and c2833xdspchiplib in Target Support Package™ TC2 software
This block configures the general-purpose I/O (GPIO) registers that control the GPIO shared pins for digital output. Each I/O port has one MUX register, which is used to select peripheral operation or digital I/O operation. There are 35 pins total. Any pin selected for output through the dialog box cannot be used simultaneously as an input. For each specified output pin you select, you can elect to toggle the GPIO pin signal.
Each group contains eight ports, with the exception of the last group which contains two. There are 35 ports, or pins, total. Select the output group to use: GPIO0~GPIO7, GPIO8~GPIO15, GPIO16~GPIO23, GPIO24~GPIO31, or GPIO32~GPIO34.
Select the pins for output from each group. Pins that you do not select for output can be used for input or peripheral functionality. Refer to the block for a table of all available peripherals for each pin.
A value of True at the input of the block drives the selected GPIO pin high. A value of False at the input of the block grounds the selected GPIO pin.
For each pin selected for output, you can elect to toggle the signal of that pin. In Toggle mode, a value of True at the input of the block switches the GPIO pin output level. Thus, if the GPIO pin was driven high, in Toggle mode, with the value of True at the input, the pin output level is driven low. If the GPIO pin was driven low, in Toggle mode, with the value of True at the input of the block, the same pin output level is driven high. If the input of the block is False, there is no effect on the GPIO pin output level.
Note The outputs of this block can be vectorized. |
C280x/C2833 GPIO Digital Input
| C280x/C2833 GPIO Digital Input | C280x/C2833x Hardware Interrupt | |
| © 1984-2008- The MathWorks, Inc. - Site Help - Patents - Trademarks - Privacy Policy - Preventing Piracy - RSS |