| Target Support Package™ TC6 | ![]() |
C62x DSP Library — Math and Matrices
The Vector Multiply block performs element-wise 32-bit multiplication of two inputs X and Y. The total number of elements in each input must be even and at least eight, and the inputs must have matching dimensions. The upper 32 bits of the 64-bit accumulator result are returned. All input and output elements are 32-bit signed fixed-point data types.
The Vector Multiply block supports both continuous and discrete sample times. This block supports little-endian code generation only.

In simulation, the Vector Multiply block is equivalent to the TMS320C62x DSP Library assembly code function DSP_mul32. During code generation, this block calls the DSP_mul32 routine to produce optimized code.
![]() | C62x Vector Minimum Value | C62x Vector Negate | ![]() |
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