SpeedWay Design Workshops: Creating FPGA-Based Coprocessors for DSP Using Model-Based Design
Increasing demand for applications with high-performance digital signal processing capabilities is leading developers to combine DSPs with FPGA coprocessors. Join design experts from MathWorks and Avnet Electronics for a three-day hands-on training to explore how to use MATLAB® and Simulink® for simulation, implementation, and verification of complex DSP systems on an Avnet DSP-FPGA Co-Processing Development kit.
Upon completion of the training, attendees will have implemented a working example of a real-time, processor-intensive algorithm running on TI’s OMAP™ L-138 (C674x DSP and ARM 9 MCU) and a Xilinx Spartan®-6 FPGA.
Who Should Attend
Engineers and systems designers interested in the development of high-performance signal-processing systems
Training Highlights
- Design and verify complex systems with MATLAB and Simulink
- Generate code for a DSP and an FPGA
- Develop an ARM application under Linux®
- Integrate and implement a coprocessor DSP, FPGA, and ARM design
Additional SpeedWay Design Workshop locations and dates are being added, so please check back for an updated schedule. If you would like a SpeedWay Workshop in your area or onsite at your company, or if you have any questions about Model-Based Design for coprocessing systems, contact fpga_expert@mathworks.com.
| Agenda | |
|---|---|
Day 1 | |
| Lecture | Overview of the Co-Processing Platform |
| Lab | FPGA – ISE Design Suite Overview and Lab OMAP – Code Composer Studio Overview and Lab |
| Lecture | Getting Started with Linux |
| Lab | Application Development on Linux |
Day 2 | |
| Lecture | Multiprocessor Communication (ARM and DSP) Using DSPLink |
| Lab | Implementing a DSPLink-Based Transfer |
| Lecture | Understanding Model-Based Design |
| Lab | Building the Simulink Model for Corner Detection Algorithm |
| Lecture | System Prototyping with the Spartan-6/OMAP Platform |
| Lab | Implementing the DSP Algorithm on the OMAP |
Day 3 | |
| Lecture | Algorithm Partitioning Between the DSP and FPGA |
| Lab | Partitioning the Algorithm and Downloading |
| Lecture | Design Verification |
| Lab | Verifying FPGA Coprocessor Functions Using Hardware Cosimulation |
| Lecture | Creating a Standalone System |
| Lab | Integrating the ARM, DSP, and FPGA Coprocessor |
