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Rapid Prototyping, and Hardware-in-the-Loop Using Simulink, Stateflow, and xPC Target™

Learn how to build and deploy real-time systems using Simulink® and Stateflow®

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Date and Location

September 16, 2008
Hotel Baronette, Novi, MI
8:00 a.m.–12:00 p.m.
27790 Novi Road,
Novi, MI  48377
(248) 349-7800
Free parking

Seminar Overview

Meet our hardware partners and system integrators (SIs), to learn how they build real-time systems to satisfy a wide array of real-world simulation and testing requirements.

Attend this seminar to meet presenters from these MathWorks system integrators:

Applied Dynamcis International (ADI) Opal-RT Pathway Technologies


Learn how these SIs build and deploy real-time systems using Simulink® and Stateflow®. They will demonstrate how to execute models in a real-time environment, on an x86 platform using Real-Time Workshop® and xPC Target.

Our SIs will also show how to reuse plant models (hardware emulation models) to perform hardware-in-the loop (HIL) testing. HIL testing lets you simulate hardware that is unavailable or inaccessible in a laboratory environment. Building rapid prototypes and HIL systems can significantly accelerate your product development cycle and simplify your overall system verification and validation tasks.

Who Should Attend

  • Systems engineers
  • Software engineers
  • Integration engineers
  • Engineering managers interested in process improvement and in optimizing your product development cycles

Seminar Highlights

  • Using xPC Target to accelerate the development of real-time controls
  • Modeling plants (emulating hardware) and designing control systems with simulation
  • Developing embedded software through automatic code generation and xPC Target
  • Applying continuous test and verification techniques throughout the development process
Agenda
8:15 Registration and continental breakfast
8:30 The MathWorks: Building system models in Simulink and Stateflow, and deploying using xPC Target
9:30 Pathway Technologies: Integrating rapid prototypes for control design and HIL into the system design process
10:20 ADI: Closed-loop engine simulations using xPC Target
11:10 Opal-RT: Using FPGAs to accelerate simulations in xPC Target systems
12:00 Seminar concludes