Recorded Webinar Series: FPGA Design Using MATLAB and Simulink

In these webinars, MathWorks and Xilinx engineers demonstrate how HDL code generation tools from MATLAB^® and Simulink^® can significantly accelerate your FPGA design cycle. Through a series of demonstrations, the presenters show how to build system models in Simulink, elaborate models for FPGA implementation, apply optimizations for improved timing and reduced FPGA resource usage, and verify implementations using accelerated hardware simulation—also known as FPGA-in-the-loop—on Xilinx development boards.

Part 1: From MATLAB and Simulink to FPGAs in Five Easy Steps
Part 2: Advanced HDL Code Generation for FPGAs Using MATLAB and Simulink
Part 3: Target-Optimized FPGA Design Using MATLAB and Simulink with Xilinx Targeted Design Platforms
Update for R2010b: Accelerate FPGA Design Using Simulink HDL Coder 2.0
Update for R2011a: Using MATLAB and Simulink for FPGA Prototyping and Verification

 

Applications and Topics Discussed

• Image processing
• Closed-loop motor control
• Using Xilinx System Generator for DSP™ in combination with Simulink HDL Coder™
• Verifying generated HDL with on Xilinx development boards using FPGA-in-the-loop
• Linking requirements to Simulink and to generated HDL

Product Focus

• Simulink HDL Coder
• Filter Design HDL Coder™
• EDA Simulator Link™
• System Generator for DSP (from Xilinx)