The CRC-N Syndrome Detector block computes checksums for its entire input frame. This block has two output ports. The first output port contains the set of message words with the CRC bits removed. The second output port contains the checksum result, which is a vector of a size equal to the number of checksums. A value of 0 indicates no checksum errors. A value of 1 indicates a checksum error occurred.
The CRC-N Syndrome Detector block is a simplified version of the General CRC Syndrome Detector block. You can select the generator polynomial for the CRC algorithm from a list of commonly used polynomials, given in the CRC-N method field in the block's dialog. N is the degree of the generator polynomial. The reference page for the CRC-N Generator block contains a list of the options for the generator polynomial.
The parameter settings for the CRC-N Syndrome Detector block should match those of the CRC-N Generator block.
You specify the initial state of the internal shift register by the Initial states parameter. You specify the number of checksums that the block calculates for each input frame by the Checksums per frame parameter. For more detailed information, see the reference page for the General CRC Syndrome Detector block.
This block supports double and boolean data types. The output data type is inherited from the input.
The CRC-N Syndrome Detector block has one input port and two output ports. All three ports accept binary column vector signals.
The generator polynomial for the CRC algorithm.
A binary scalar or a binary row vector of length equal to the degree of the generator polynomial, specifying the initial state of the internal shift register.
A positive integer specifying the number of checksums the block calculates for each input frame.
For a description of the CRC algorithm as implemented by this block, see Cyclic Redundancy Check Codes in Communications System Toolbox™ User's Guide.
 Sklar, Bernard. Digital Communications: Fundamentals and Applications. Englewood Cliffs, N.J., Prentice-Hall, 1988.
 Wicker, Stephen B., Error Control Systems for Digital Communication and Storage, Upper Saddle River, N.J., Prentice Hall, 1995.