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Detect errors in input data frames according to generator polynomial

CRC sublibrary of Error Correction and Detection

The General CRC Syndrome Detector block computes checksums for its entire input frame. This block accepts a binary column vector input signal.

The block's second output is a vector whose size is the number of checksums, and whose entries are 0 if the checksum computation yields a zero value, and 1 otherwise. The block's first output is the set of message words with the checksums removed.

The first output is the data frame with the CRC bits removed and the second output indicates if an error was detected in the data frame.

The block's parameter settings should agree with those in the General CRC Generator block.

You specify the number of checksums the block calculates for
each frame by the **Checksums per frame** parameter.
If the **Checksums per frame** value is * k*,
the size of the input frame is

This block supports `double`

and `boolean`

data
types. The block inherits the output data type from the input signal.

Suppose the received codeword has size 16, the generator polynomial
has degree 3, **Initial states** is `[0]`

,
and **Checksums per frame** is `2`

.
The block computes the two checksums of size 3, one from the first
half of the received codeword, and the other from the second half
of the received codeword, as shown in the following figure. The initial
states are not shown in this example, because an initial state of `[0]`

does
not affect the output of the CRC algorithm. The block concatenates
the two halves of the message word as a single vector of size 10 and
outputs this vector through the first output port. The block outputs
a 2-by-1 binary frame vector whose entries depend on whether the computed
checksums are zero. The following figure shows an example in which
the first checksum is nonzero and the second checksum is zero. This
indicates that an error occurred in transmitting the first half of
the codeword.

The General CRC Syndrome Detector block has one input port and two output ports. These ports accept binary column vector signals.

**Generator polynomial**A character vector, a binary row vector in descending order of powers, or an integer row vector in descending order of powers.

**Initial conditions**A binary scalar or a binary row vector of length equal to the degree of the generator polynomial, specifying the initial state of the internal shift register.

**Direct method**When you select this check box, the object uses the direct algorithm for CRC checksum calculations. When you clear this check box, the object uses the non-direct algorithm for CRC checksum calculations.

**Reflect input bytes**When you select this check box, the block flips the input data on a bytewise basis prior to entering the data into the shift register. For this application, the input frame length (and any current input frame length for variable-size signals) divided by the value for the

**Checksums per frame**parameter minus the degree of the generator polynomial, which you specify in the**Generator polynomial**parameter, must be a multiple of eight. When you clear this check box, the block does not flip the input data.**Reflect checksums before final XOR**When you select this check box, the block flips the CRC checksums around their centers after the input data are completely through the shift register. When you clear this check box, the block does not flip the CRC checksums.

**Final XOR**Specify the value with which the CRC checksum is to be XORed as a binary scalar or vector. The block applies the XOR operation just prior to appending the input data. The vector length is the degree of the generator polynomial that you specify in the

**Generator polynomial**parameter. When you specify the final XOR value as a scalar, the block expands the value to a row vector with a length equal to the degree of the generator polynomial. The default value of this parameter is`0`

, which is equivalent to no XOR operation.**Checksums per frame**Specify the number of checksums the block calculates for each input frame. This value must be a positive integer. The input frame length (and any current input frame length for variable-size signals) must be a multiple of this parameter value.

For a description of the CRC algorithm as implemented by this
block, see Cyclic Redundancy Check Codes in *Communications System Toolbox™ User's
Guide*.

[1] Sklar, Bernard. *Digital Communications:
Fundamentals and Applications*. Englewood Cliffs, N.J.,
Prentice-Hall, 1988.

[2] Wicker, Stephen B., *Error Control
Systems for Digital Communication and Storage*, Upper
Saddle River, N.J., Prentice Hall, 1995.

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