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The General QAM Demodulator Baseband block demodulates a signal that was modulated using quadrature amplitude modulation. The input is a baseband representation of the modulated signal.
The input must be a discretetime complex signal. The Signal constellation parameter defines the constellation by listing its points in a lengthM vector of complex numbers. The block maps the mth point in the Signal constellation vector to the integer m1.
This block accepts a scalar or column vector input signal. For information about the data types each block port supports, see the Supported Data Types table on this page.
A real or complex vector that lists the constellation points.
Determines whether the block produces integers or binary representations of integers.
If you set this parameter to Integer, the block produces integers.
If you set this parameter to Bit, the block produces a group of K bits, called a binary word, for each symbol, when Decision type is set to Hard decision. If Decision type is set to Loglikelihood ratio or Approximate loglikelihood ratio, the block outputs bitwise LLR and approximate LLR, respectively.
This field appears when Bit is selected in the pulldown list Output type.
Specifies the use of hard decision, LLR, or approximate LLR during demodulation. See Exact LLR Algorithm and Approximate LLR Algorithm in the Communications System Toolbox User's Guide for algorithm details.
This field appears when you set Approximate loglikelihood ratio or Loglikelihood ratio for Decision type.
When you set this parameter to Dialog, you can then specify the noise variance in the Noise variance field. When you set this option to Port, a port appears on the block through which the noise variance can be input.
This parameter appears when the Noise variance source is set to Dialog and specifies the noise variance in the input signal. This parameter is tunable in normal mode, Accelerator mode and Rapid Accelerator mode.
If you use the Simulink^{®} Coder™ rapid simulation (RSIM) target to build an RSIM executable, then you can tune the parameter without recompiling the model. This is useful for Monte Carlo simulations in which you run the simulation multiple times (perhaps on multiple computers) with different amounts of noise.
The LLR algorithm involves computing exponentials of very large or very small numbers using finite precision arithmetic and would yield:
Inf to Inf if Noise variance is very high
NaN if Noise variance and signal power are both very small
In such cases, use approximate LLR, as its algorithm does not involve computing exponentials.
FixedPoint Signal Flow Diagram for Hard Decision Mode
The general QAM Demodulator Baseband block supports fixedpoint operations for computing Hard Decision (Output type set to Bit and Decision type is set to Hard decision) and Approximate LLR (Output type is set to Bit and Decision type is set to Approximate LogLikelihood ratio) output values. The input values must have fixedpoint data type for fixedpoint operations.
FixedPoint Signal Flow Diagram for Approximate LLR Mode
FixedPoint Signal Flow Diagram for Approximate LLR Mode: Noise Variance Operation Modes
FixedPoint Attributes for Hard Decision Mode
The block supports the following Output options:
When you set the parameter to Inherit via internal rule (default setting), the block inherits the output data type from the input port. The output data type is the same as the input data type if the input is of type single or double.
For integer outputs, you can set this block's output to Inherit via internal rule (default setting), Smallest unsigned integer, int8, uint8, int16, uint16, int32, uint32, single, and double.
For bit outputs, when you set Decision type to Hard decision, you can set the output to Inherit via internal rule, Smallest unsigned integer, int8, uint8, int16, uint16, int32, uint32, boolean, single, or double.
When you set Decision type to Hard decision or Approximate loglikelihood ratio and the input is a floating point data type, then the output inherits its data type from the input. For example, if the input is of data type double, the output is also of data type double. When you set Decision type to Hard decision or Approximate loglikelihood ratio, and the input is a fixedpoint signal, the Output parameter, located in the FixedPoint algorithm parameters region of the DataType tab, specifies the output data type.
When you set the parameter to Smallest unsigned integer, the output data type is selected based on the settings used in the Hardware Implementation pane of the Configuration Parameters dialog box. If you select ASIC/FPGA in the Hardware Implementation pane, the output data type is the ideal minimum size, i.e., ufix(1) for bit outputs, and for integer outputs. For all other choices, the Output data type is an unsigned integer with the smallest available word length large enough to fit the ideal minimum size, usually corresponding to the size of a char (e.g., uint8).
Use this parameter to specify the rounding method to be used when the result of a fixedpoint calculation does not map exactly to a number representable by the data type and scaling storing the result.
For more information, see Rounding Modes in the DSP System Toolbox™ documentation Rounding Mode: Simplest in the FixedPoint Designer™ documentation.
Use this parameter to specify the method to be used if the magnitude of a fixedpoint calculation result does not fit into the range of the data type and scaling that stores the result:
Saturate represents positive overflows as the largest positive number in the range being used, and negative overflows as the largest negative number in the range being used.
Wrap uses modulo arithmetic to cast an overflow back into the representable range of the data type. See Modulo Arithmetic for more information.
For more information, see the Rounding Mode Parameter subsection of Specify FixedPoint Attributes for Blocks.
Use this parameter to define the data type of the Signal constellation parameter.
When you select Same word length as input the word length of the Signal constellation parameter matches that of the input to the block. The fraction length is computed to provide the best precision for given signal constellation values.
When you select Specify word length, the Word Length field appears, and you may enter a value for the word length. The fraction length is computed to provide the best precision for given signal constellation values.
Use this parameter to specify the data type for Accumulator 1:
When you select Inherit via internal rule, the block automatically calculates the output word and fraction lengths. For more information, see the Inherit via Internal Rule subsection of the DSP System Toolbox User's Guide.
When you select Binary point scaling, you can enter the word length and the fraction length of Accumulator 1, in bits.
Use this parameter to specify the data type for Product input.
When you select Same as accumulator 1, the Product Input characteristics match those of Accumulator 1.
When you select Binary point scaling you can enter the word length and the fraction length of Product input, in bits.
Use this parameter to select the data type for Product output.
When you select Inherit via internal rule, the block automatically calculates the output signal type. For more information, see the Inherit via Internal Rule subsection of the DSP System Toolbox User's Guide.
When you select Binary point scaling enter the word length and the fraction length for Product output, in bits.
Use this parameter to specify the data type for Accumulator 2:
When you select Inherit via internal rule, the block automatically calculates the accumulator data type. The internal rule calculates the ideal, fullprecision word length and fraction length as follows:
WL_{ideal accumulator 2} = WL_{input to accumulator 2}
FL_{ideal accumulator 2} = FL _{input to accumulator 2}
After the fullprecision result is calculated, your particular hardware may still affect the final word and fraction lengths set by the internal rule. For more information, see The Effect of the Hardware Implementation Pane on the Internal Rule subsection of the DSP System Toolbox User's Guide.
The internal rule always sets the sign of datatype to Unsigned .
When you select Binary point scaling, you are able to enter the word length and the fraction length of Accumulator 2, in bits.
FixedPoint Attributes for Approximate LLR Mode
The settings for the following fixedpoint parameters only apply when you set Decision type to Approximate loglikelihood ratio.
When you select Inherit via internal rule, the block automatically calculates the accumulator data type. The internal rule first calculates ideal, fullprecision word length and fraction length as follows:
WL_{ideal accumulator 3} = WL_{input to accumulator 3} + 1
FL _{ideal accumulator 3} = FL _{input to accumulator 3}.
After the fullprecision result is calculated, your particular hardware may still affect the final word and fraction lengths set by the internal rule. For more information, see The Effect of the Hardware Implementation Pane on the Internal Rule subsection of the DSP System Toolbox User's Guide.
The internal rule always sets the sign of datatype to Signed.
When you select Same as accumulator 3, the Noise scaling input characteristics match those of Accumulator 3.
When you select Binary point scaling you are able to enter the word length and the fraction length of Noise scaling input, in bits.
This field appears when Noise variance source is set to Dialog.
When you select Same word length as input the word length of the Inverse noise variance parameter matches that of the input to the block. The fraction length is computed to provide the best precision for a given inverse noise variance value.
When you select Specify word length, the Word Length field appears, and you may enter a value for the word length. The fraction length is computed to provide the best precision for a given inverse noise variance value.
When you select Inherit via internal rule , the Output data type is automatically set for you.
If you set the Noise variance source parameter to Dialog, the output is a result of product operation as shown in the Noise Variance Operation Modes Signal Flow Diagram FixedPoint Signal Flow Diagram for Approximate LLR Mode: Noise Variance Operation Modes. In this case, it follows the internal rule for Product data types specified in the Inherit via Internal Rule subsection of the DSP System Toolbox User's Guide.
If the Noise variance source parameter is set to Port, the output is a result of division operation as shown in the signal flow diagram. In this case, the internal rule calculates the ideal, fullprecision word length and fraction length as follows:
WL _{output} = max(WL _{Noise scaling input}, WL_{ Noise variance})
FL _{output} = FL _{Noise scaling input (dividend)}– FL _{Noise variance (divisor)} .
After the fullprecision result is calculated, your particular hardware may still affect the final word and fraction lengths set by the internal rule. For more information, see The Effect of the Hardware Implementation Pane on the Internal Rule subsection of the DSP System Toolbox User's Guide.
The internal rule for Output always sets the sign of datatype to Signed.
For additional information about the parameters pertaining to fixedpoint applications, see Specify FixedPoint Attributes for Blocks.
Port  Supported Data Types 

Input 

Var 

Output 
