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The OQPSK Demodulator Baseband block demodulates a signal that was modulated using the offset quadrature phase shift keying method. The input is a baseband representation of the modulated signal.
The input must be a discretetime complex signal. This block accepts a scalarvalued or column vector input signal. For information about the data types each block port supports, see Supported Data Types.
When you set the Output type parameter to Integer, the block outputs integer symbol values between 0 and 3. When you set the Output type parameter to Bit, the block outputs a 2–bit binary representation of integers, in a binaryvalued vector with a length that is an even number.
The block produces one output symbol for each pair of input samples. The input sample period is half the period of each output integer or bit pair. The constellation used to map bit pairs to symbols is on the reference page for the OQPSK Modulator Baseband block.
In singlerate processing mode, the input and output signals have the same port sample time. The block implicitly implements the rate change by making a size change at the output when compared to the input. The input can be an even length column vector.
When you set Output type to Bit, the output width is 2 times the number of input symbols.
When you set Output type to Integer, the output width is the number of input symbols.
To open this modelopen this model, type doc_moqpskdemod_fb at the MATLAB^{®} command line.
In multirate processing mode, the input and output signals have different port sample times. The input must be a scalar. The output symbol time is two times the input sample time.
When you set Output type to Bit, the output width equals 2.
When you set Output type to Integer, the output is a scalar.
To open this modelopen this model, type doc_moqpskdemod_sb at the MATLAB command line.
The modulatordemodulator pair incurs a delay, as described in Example: Delays from Demodulation.
OQPSK FixedPoint Signal Flow Diagram
Note: Every two input samples produce one output symbol. In the preceding figure, the dotted line represents the region comprised of input sample processing. 
OQPSK Floating Point Signal Flow Diagram
The amount by which the phase of the zeroth point of the signal constellation is shifted from π/4.
Determines whether the output consists of integers or pairs of bits.
Select the rate processing option for the block.
Enforce singlerate processing — When you select this option, the input and output signals have the same port sample time. The block implements the rate change by making a size change at the output when compared to the input. The output width equals half the input width for integer outputs.
Allow multirate processing — When you select this option, the input and output signals have different port sample times. The output symbol time is two times the input sample time.
Note: The option Inherit from input (this choice will be removed  see release notes) will be removed in a future release. See FrameBased Processing in the Communications System Toolbox™ Release Notes for more information. 
Data Type Pane
For bit outputs, the output data type can be set to 'Inherit via internal rule', 'Smallest unsigned integer', double, single, int8, uint8, int16, uint16, int32, uint32, or boolean.
For integer outputs, the output data type can be set to 'Inherit via internal rule', 'Smallest unsigned integer', double, single, int8, uint8, int16, uint16, int32, or uint32.
When this parameter is set to 'Inherit via internal rule' (default setting), the block will inherit the output data type from the input port. The output data type will be the same as the input data type if the input is a floatingpoint type (single or double). If the input data type is fixedpoint, the output data type will work as if this parameter is set to 'Smallest unsigned integer'.
When this parameter is set to 'Smallest unsigned integer', the output data type is selected based on the settings used in the Hardware Implementation pane of the Configuration Parameters dialog box of the model.
If ASIC/FPGA is selected in the Hardware Implementation pane, and Output type is Bit, the output data type is the ideal minimum onebit size, i.e., ufix1. For all other selections, it is an unsigned integer with the smallest available word length large enough to fit one bit, usually corresponding to the size of a char (e.g., uint8).
If ASIC/FPGA is selected in the Hardware Implementation pane, and Output type is Integer, the output data type is the ideal minimum twobit size, i.e., ufix2. For all other selections, it is an unsigned integer with the smallest available word length large enough to fit two bits, usually corresponding to the size of a char (e.g., uint8).
This parameter only applies when the input is fixedpoint and Phase offset is not a multiple of .
This can be set to Same word length as input or Specify word length, in which case a field is enabled for user input.
Specify the data type for the Accumulator. You can set this parameter to Inherit via internal rule, Same as input or Binary point scaling.
The Accumulator parameter only applies for fixedpoint inputs. The selections you make for the Rounding and Overflow parameters affect the Accumulator.
Fixedpoint Communications System Toolbox blocks that must hold summation results for further calculation usually allow you to specify the data type and scaling of the accumulator. Most such blocks cast to the accumulator data type prior to summation:
Use the Accumulator—Mode parameter to specify how you would like to designate the accumulator word and fraction lengths:
When you select Inherit via internal rule, the accumulator output word and fraction lengths are automatically calculated for you. Refer to Inherit via Internal Rule for more information.
When you select Same as product output, these characteristics match those of the product output.
When you select Same as input, these characteristics match those of the first input to the block.
When you select Binary point scaling, you are able to enter the word length and the fraction length of the accumulator, in bits.
When you select Slope and bias scaling, you are able to enter the word length, in bits, and the slope of the accumulator. The bias of all signals in DSP System Toolbox™ software is zero.
The block uses the Rounding method when the result of a fixedpoint calculation does not map exactly to a number representable by the data type and scaling storing the result. For more information, see Rounding Modes in DSP System Toolbox User's Guide or Rounding Mode: Simplest in the FixedPoint Designer™ documentation.
Specify the method of storing the result when the magnitude of a fixedpoint calculation result that does not does not fit within the range of the data type selected. You can select either Wrap or Saturate for this parameter.
For more information refer to Overflow in the Precision and Range subsection of DSP System Toolbox.
This can be set to Same as accumulator or Binary point scaling. This parameter only applies for fixedpoint inputs.
Port  Supported Data Types 

Input 

Output 
