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Polyphase filter bank and fast Fourier transform—optimized for HDL code generation

**Library:**DSP System Toolbox / Filtering / Multirate Filters

DSP System Toolbox HDL Support / Filtering

The Channelizer HDL Optimized block separates
a broadband input signal into multiple narrowband output signals.
It provides hardware speed and area optimization for streaming data
applications. The block accepts scalar or vector input of real or
complex data, provides hardware-friendly control signals, and has
optional output frame control signals. You can achieve giga-sample-per-second
(GSPS) throughput using vector input. The block implements a polyphase
filter, with one subfilter per input vector element. The hardware
implementation interleaves the subfilters, which results in sharing
each filter multiplier (*FFT Length* / *Input
Size*) times. The FFT implementation uses the same pipelined
Radix 2^2 FFT algorithm as the FFT HDL Optimized block.

[1] Harris, F. J., C. Dick, and M. Rice. “Digital
Receivers and Transmitters Using Polyphase Filter Banks for Wireless
Communications.” *IEEE Transactions on Microwave
Theory and Techniques*. Vol. 51, No. 4, April 2003.

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