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Discrete FIR Filter

Model FIR filters

Library

Filtering / Filter Implementations

dsparch4

Description

This block is the same as the Simulink® Discrete FIR Filter block. For more information, see the Discrete FIR Filter reference page in the Simulink documentation.

HDL Code Generation

This block supports HDL code generation using HDL Coder™. HDL Coder provides additional configuration options that affect HDL implementation and synthesized logic. For more information on implementations, properties, and restrictions for HDL code generation, see Discrete FIR Filter.

Introduced in R2011a

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