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The Fixed-Point Designer™ software does not attempt to standardize on one particular fixed-point digital filter design method. For example, you can produce a design in continuous time and then obtain an "equivalent" discrete-time digital filter using one of many transformation methods. Alternatively, you can design digital filters directly in discrete time. After you obtain a digital filter, it can be realized for fixed-point hardware using any number of canonical forms. Typical canonical forms are the direct form, series form, and parallel form, each of which is outlined in the sections that follow.

For a given digital filter, the canonical forms describe a set of fundamental operations for the processor. Because there are an infinite number of ways to realize a given digital filter, you must make the best realization on a per-system basis. The canonical forms presented in this chapter optimize the implementation with respect to some factor, such as minimum number of delay elements.

In general, when choosing a realization method, you must take these factors into consideration:

**Cost**The cost of the realization might rely on minimal code and data size.

**Timing constraints**Real-time systems must complete their compute cycle within a fixed amount of time. Some realizations might yield faster execution speed on different processors.

**Output signal quality**The limited range and precision of the binary words used to represent real-world numbers will introduce errors. Some realizations are more sensitive to these errors than others.

The Fixed-Point Designer software allows you to evaluate
various digital filter realization methods in a simulation environment.
Following the development cycle outlined in Developing and Testing Fixed-Point Systems, you can fine-tune the realizations
with the goal of reducing the cost (code and data size) or increasing
signal quality. After you have achieved the desired performance, you
can use the Simulink^{®} Coder™ product to generate rapid prototyping
C code and evaluate its performance with respect to your system's
real-time timing constraints. You can then modify the model based
upon feedback from the rapid prototyping system.

The presentation of the various realization structures takes into account that a summing junction is a fundamental operator, thus you may find that the structures presented here look different from those in the fixed-point filter design literature. For each realization form, an example is provided using the transfer function shown here:

In general, a direct form realization refers to a structure
where the coefficients of the transfer function appear directly as
Gain blocks. The direct form II realization method is presented as
using the minimal number of delay elements, which is equal to *n*,
the order of the transfer function denominator.

The canonical direct form II is presented as "Standard
Programming" in *Discrete-Time Control Systems* by
Ogata. It is known as the "Control Canonical Form" in *Digital
Control of Dynamic Systems* by Franklin, Powell, and Workman.

You can derive the canonical direct form II realization by writing
the discrete-time transfer function with input *e*(*z*) and
output *u*(*z*) as

The block diagram for *u*(*z*)/*h*(*z*) follows.

The block diagrams for *h*(*z*)/*e*(*z*) follow.

Combining these two block diagrams yields the direct form II diagram shown in the following figure. Notice that the feedforward part (top of block diagram) contains the numerator coefficients and the feedback part (bottom of block diagram) contains the denominator coefficients.

The direct form II example transfer function is given by

The realization of *H _{ex}*(

fxpdemo_direct_form2

at the MATLAB^{®} command line.

In the canonical series cascade form, the transfer
function *H*(*z*) is
written as a product of first-order and second-order transfer functions:

This equation yields the canonical series cascade form.

Factoring *H*(*z*) into *H _{i}*(

For example, one factorization of *H*(*z*) might
be

You must also take into consideration that the ordering of the
individual *H _{i}*(

The first-order diagram for *H*(*z*) follows.

The second-order diagram for *H*(*z*) follows.

The series cascade form example transfer function is given by

The realization of *H _{ex}*(

fxpdemo_series_cascade_form

at the MATLAB command line.

In the canonical parallel form, the transfer function *H*(*z*) is
expanded into partial fractions. *H*(*z*) is
then realized as a sum of a constant, first-order, and second-order
transfer functions, as shown:

This expansion, where *K* is
a constant and the *H _{i}*(

As in the series canonical form, there is no unique description
for the first-order and second-order transfer function. Because of
the nature of the Sum block, the ordering of the individual filters
doesn't matter. However, because of the constant *K*,
you can choose the first-order and second-order transfer functions
such that their forms are simpler than those for the series cascade
form described in the preceding section. This is done by expanding *H*(*z*) as

The first-order diagram for *H*(*z*) follows.

The second-order diagram for *H*(*z*) follows.

The parallel form example transfer function is given by

The realization of *H _{ex}*(

fxpdemo_parallel_form

at the MATLAB command line.

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