Documentation

Getting Started with Filter Design HDL Coder

Tutorials

Basic FIR Filter

Design a basic quantized discrete-time FIR filter, generate VHDL code for the filter, and verify the VHDL code with a generated test bench.

Optimized FIR Filter

Design an optimized FIR filter, generate Verilog code for the filter, and verify the Verilog code with a generated test bench.

IIR Filter

Design an IIR filter, generate VHDL code for the filter, and verify the VHDL code with a generated test bench.

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