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Synthesis Automation Properties

Control generation of script for HDL synthesis tool

You can customize synthesis script generation.

When you specify an HDL synthesis tool, the coder generates a script to call that synthesis tool on your generated HDL code. You can modify the commands that the coder prints to the script using the properties on this page. The coder passes the property values to fprintf to create the script. You can use format character vectors supported by the fprintf function. For example, '\n' inserts a new line into the script file.

Specify these properties as Name,Value pair arguments to the generatehdl function, or set the corresponding options in the Generate HDL dialog box.

To see these options in the Generate HDL dialog box, select the EDA Tool Scripts tab, and click Synthesis script from the menu in the left column.

Synthesis Automation

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This property enables or disables generation of scripts for third-party synthesis tools. By default, the coder does not generate a synthesis script. To generate a script for one of the supported synthesis tools, set HDLSynthTool to one of the tool names in the table. The coder uses tool-specific default values for the HDLSynthCmd, HDLSynthInit, and HDLSynthTerm properties. You can customize each of these properties according to your target device, constraints, and so on.

HDLSynthTool ValueSynthesis Tool
noneN/A; script generation disabled
'ISE'Xilinx® ISE
'Vivado'

Xilinx Vivado®

'Libero'

Microsemi® Libero®

'Precision'Mentor Graphics® Precision
'Quartus'Altera® Quartus II
'Synplify'

Synopsys® Synplify Pro®

'Custom'Varies; set the HDLSynthCmd, HDLSynthInit, and HDLSynthTerm properties to generate a script that supports your tool.

The default value of this property depends on your setting for HDLSynthTool.

For example, if the value of HDLSynthTool is 'Synplify', then HDLSynthFilePostfix defaults to '_synplify.tcl'. Then, if the name of the device under test is my_design, the coder adds the postfix _synplify.tcl to form the synthesis script file name my_design_synplify.tcl.

The coder prints this command at the beginning of the synthesis script. The default value of this property depends on your setting for HDLSynthTool. The implicit argument, %s, is the name of your top-level entity or module.

For example, if you set HDLSynthTool to 'ISE', this property defaults to:

set src_dir [pwd]\nset prj_dir "synprj"\n
file mkdir ../$prj_dir\n
cd ../$prj_dir\n
project new %s.xise\n
project set family Virtex4\n
project set device xc4vsx35\n
project set package ff668\n
project set speed -10\n

This command adds your generated HDL source file to the list of files to be compiled. The coder prints this command to the script once for each generated HDL file. The default value of this property depends on your setting for HDLSynthTool. The implicit argument, %s, is the name of the HDL file.

For example, if you set HDLSynthTool to 'Quartus', this property defaults to 'set_global_assignment -name %s_FILE "$src_dir/%s"\n'. The first implicit argument is the TargetLanguage, and the second is the name of the HDL file. The first argument is used only when your synthesis tool is set to 'Quartus'.

The default value of this property depends on your setting for HDLSynthTool. This section of the script does not have implicit arguments.

For example, if you set HDLSynthTool to 'Synplify', this property defaults to:

set_option -technology VIRTEX4\n
set_option -part XC4VSX35\n
set_option -synthesis_onoff_pragma 0\n
set_option -frequency auto\n
project -run synthesis\n

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