Building HDL Test Bench for QAM Transceiver Model

This example shows how to build a behavioral test bench using SystemVerilog DPI-C component generation. This test bench is used for the verification of synthesizable HDL code of a 64-QAM transmitter and receiver.

Requirements and Prerequisites

Products required for this example:


  • Simulink®

  • Simulink Coder®

  • One of the supported HDL simulators: Cadence® Incisive®, or Mentor Graphics® ModelSim®/QuestaSim®

  • One of the supported C compiler: Microsoft® Visual Studio™ for Windows, or GNU GCC for Linux®


The top-level structure of the QAM receiver model is shown in the following figure. The QAM Tx HDL and QAM Rx HDL subsystems have been optimized for HDL code generation. Using HDL Coder, we can generate HDL code from those two subsystems. This example is shipped with generated HDL code, so you do not have to generate the code for this exercise.

Set Up Model for Code Generation

To build a complete behavioral testbench in HDL, we will need the behavioral models for the Channel subsystem, and for the ErrorRate subsystem. With these models, we can generate SystemVerilog DPI-C components for those two subsystems. Before generating DPI-C components, we need to set code generation options first.

Open Simulink Model Configuration Parameter panel from the svdpi_qam model. Set the following parameters:

Select Code Generation -> System Target File. Click Browse button and select "systemverilog_dpi_grt.tlc".

If you have Embedded Coder you can alternatively choose the 'systemverilog_dpi_ert' target file.

In Toolchain setting, select one of the Visual Studio versions if you are using Windows, or one of the GCC toolchains if you are using Linux.

Next, export the DPI-C components by executing the following two commands in MATLAB:

>> rtwbuild('svdpi_qam/Channel')

>> rtwbuild('svdpi_qam/ErrorRate')

Copy Test Bench Files

Run the following command to copy all required test bench files to the current directory

>> copyfile(fullfile(matlabroot,'toolbox','hdlverifier','hdlverifier_examples','svdpi_qam','*'),pwd)

Run Generated Test Bench

For Mentor Graphics ModelSim/QuestaSim,

  1. Start ModelSim/QuestaSim in GUI mode.

  2. Change your current directory to the current MATLAB directory

  3. Enter the following command to start your simulation:


For Cadence Incisive:

  • Start your terminal shell.

  • Change your current directory to the current MATLAB directory.

  • Enter the following command in your shell.


At the end of the simulation, the error rate is printed as follows:

************* Simulation Summary ********************

Bit error rate : 0.001356

Number of errors : 4.000000

Number of received bits : 2950.000000


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