Documentation

Getting Started with SystemVerilog DPI Component Generation

This example shows you how to generate a SystemVerilog DPI component from a proportional-integral-derivative (PID) controller in a Simulink® model, and export it to an HDL simulator.

Requirements and Prerequisites

Products required for this example:

  • MATLAB®

  • Simulink®

  • Simulink Coder®

  • One of the supported HDL simulators: Mentor Graphics® ModelSim®/QuestaSim® or Cadence® Incisive

  • One of the supported C compiler: Microsoft® Visual C++, or GNU GCC

Set Up Example

Run the following code to set up the design

cd(tempdir);
[~, ~, ~] = rmdir('svdpi_pid', 's');
mkdir('svdpi_pid');
cd('svdpi_pid');
open_system('svdpi_pid');

Set Up Model for Code Generation

Open the Simulink Model Configuration Parameter panel from the svdpi_pid model. Set the following parameters:

Select Code Generation -> System Target File. Click Browse button and select "systemverilog_dpi_grt.tlc".

If you have Embedded Coder you can alternatively choose the 'ert' target file, as shown in the figure below.

In Toolchain setting, select one of the Visual Studio versions if you are using Windows, or one of the GCC toolchains if you are using Linux.

Make sure that option "Generate code only" is unchecked.

Select Code Generation -> SystemVerilog DPI, and check the option "Generate Test Bench"

Now we are done with the Configuration Parameter panel. Click "OK" button to close it.

Select Internal Signals for Test Point Logging (Optional)

If you are interested in accesing internal signals of the DPI-C componenent in SystemVerilog environment, then you can use the DPI-C test point logging capability.

First step is to select which signals you want to access. You can do this by right clicking the signal of interest and selecting "Properties".

In the dialog select the check box marked as "Test Point" and give the signal a label in "Signal Name". Note:It is recommended to give the signal a name in "Signal Name" to every Test Point,otherwise it will be hard to map the signal to the generated code.

If you are also interested in capturing the test vector of the internal signal, and play it back in the generated testbench then select the "Test Point" and "Log Signal Data" check boxes.

The second step is to enable the C API offered by embedded coder. To do this go to the Configuration Parameters pane and on the Code Generation -> Interface make sure that at least the "signals" checkbox is selected.

The third step is to choose the interface of the SystemVerilog functions that will be used to access the test points.This is done by selecting from the drop down menu under: Code Generation -> SystemVerilog DPI -> Test Point Access Functions

If you select "None" then the test points marked will be ignored, and no access functions will be generated.

Selecting "One function per test point" will allow you to access each test point independently.If this option is selected, the interface generated for this example is shown below:

Selecting "One function for all test points" will allow you to access all the test point with one function call. If this option is selected, the interface generated for this example is shown below:

After running the generated test bench you can see the waveform signals.

Notice that for "Gain_1_TestPoint" there are no reference values to compare with, since we only checked the "Test Point" check box earlier. In contrast for "Gain_4_TestPoint_And_Logging" in addition to an access function there are also reference values to compare with.

Generate SystemVerilog DPI Component

  1. In the "svdpi_pid" model, right click the Controller block, and select C/C++ Code -> Generate code for this subsystem.

  2. Click Build in the dialog box that appears.

  3. The SystemVerilog component is generated as "Controller_build/Controller_dpi.sv". When code generation is completed, examine the new component.

Run the Generated Test Bench

For ModelSim/QuestaSim,

  1. Start ModelSim/QuestaSim in GUI mode.

  2. Change your current directory to "dpi_tb" under the code generation directory in your HDL simulator.

  3. Enter the following command to start your simulation

do  run_tb_mq.do

For Incisive simulator:

  • Start your terminal shell

  • Change the current directory to "dpi_tb" under the code generation directory

  • Enter the following command in your shell.

sh run_tb_incisive.sh

For VCS simulator:

  • Start your terminal shell

  • Change the current directory to "dpi_tb" under the code generation directory

  • Enter the following command in your shell.

sh run_tb_vcs.sh
  • When the simulation finishes, you should see the following text printed in your console:

**************TEST COMPLETED (PASSED)**************
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