S-R Latch

Model an S-R Latch behaviorally

Library

Logic

Description

The S-R Latch block is an abstracted behavioral model of a set-reset latch. It does not model the internal individual MOSFET devices (see Basic Assumptions and Limitations for details). Therefore, the block runs quickly during simulation but retains the correct I/O behavior.

If the gate voltage is greater than the threshold voltage VTH, then the input taken is 1 (HIGH). Otherwise, the input is zero (LOW). The gate threshold voltage VTH is halfway between the Low level input voltage (VIL) and High level input voltage (VIH) parameters.

The block output logic level is either HIGH or LOW, according to the logic levels of the gate inputs and the S-R latch truth table.

SRQ
000
010
101
111

The block models the gate as follows:

  • The gate inputs have infinite resistance and finite or zero capacitance.

  • The gate output offers a selection of two models: Linear and Quadratic. For more information, see Selecting the Output Model for Logic Blocks. Use the Output current-voltage relationship parameter to specify the output model.

  • You can specify propagation delay for both output models. For Linear output, the block sets the value of the gate output capacitor such that the resistor-capacitor time constant equals the Propagation delay parameter value. For Quadratic output, the gate input demand is lagged to approximate the Propagation delay parameter value.

The block output voltage depends on the output model selected:

  • For Linear model, output high is the High level output voltage parameter value, and output low is the Low level output voltage parameter value.

  • For Quadratic model, the output voltage for High and Low states is a function of the output current, as explained in Quadratic Model Output and Parameters. For zero load current, output high is Vcc (the Supply voltage parameter value), and output low is zero volts.

Basic Assumptions and Limitations

The block does not model the internal individual MOSFET devices that make up the gate (except for the final MOSFET pair if you select the Quadratic option for the Output current-voltage relationship parameter). This limitation has the following implications:

  • The behavior of this block is abstracted. In particular, response to input noise and inputs that are around the logic threshold voltage can be inaccurate. Also, dynamic response is approximate.

  • The linear drop in output voltage as a function of output current is an approximation to the MOSFET or bipolar output behavior.

  • Modeling of the output as a controlled voltage source is representative of a totem-pole or push-pull output stage. To model a device with an open-collector:

    1. Connect the output pin to the base of an NPN Bipolar Transistor or PNP Bipolar Transistor block.

    2. Set the Output resistance parameter to a suitable value.

Dialog Box and Parameters

Inputs Tab

Low level input voltage

Voltage value less than which the block interprets the input voltage as LOW. The default value is 2 V.

High level input voltage

Voltage value greater than which the block interprets the input voltage as HIGH. The default value is 3 V.

Average input capacitance

Fixed capacitance that approximates the input capacitance for a MOSFET gate. You can usually find this capacitance value on a manufacturer datasheet. The default value is 5 pF. Setting this value to zero can result in faster simulation times.

Outputs Tab

Output current-voltage relationship

Select the output model, Linear or Quadratic. The default value is Linear.

Low level output voltage

Voltage value at the output when the output logic level is LOW. The default value is 0 V. This parameter is available when you select the Linear option for the Output current-voltage relationship parameter.

High level output voltage

Voltage value at the output when the output logic level is HIGH. The default value is 5 V. This parameter is available when you select the Linear option for the Output current-voltage relationship parameter.

Output resistance

Value of the series output resistor that is used to model the drop in output voltage resulting from the output current. The default value is 25 Ω. You can derive this value from a datasheet by dividing the high-level output voltage by the maximum low-level output current. This parameter is available when you select the Linear option for the Output current-voltage relationship parameter.

Supply voltage

Supply voltage value applied to the gate in your circuit. The default value is 5 V. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Measurement voltage

The gate supply voltage for which mask data output resistances and currents are defined. The default value is 5 V. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Logic HIGH output resistance at zero current and at I_OH

A row vector [ R_OH1 R_OH2 ] of two resistance values. The first value R_OH1 is the gradient of the output voltage-current relationship when the gate is logic HIGH and there is no output current. The second value R_OH2 is the gradient of the output voltage-current relationship when the gate is logic HIGH and the output current is I_OH. The default value is [ 25 250 ] Ω. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Logic HIGH output current I_OH when shorted to ground

The resulting current when the gate is in the logic HIGH state, but the load forces the output voltage to zero. The default value is 63 mA. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Logic LOW output resistance at zero current and at I_OL

A row vector [ R_OL1 R_OL2 ] of two resistance values. The first value R_OL1 is the gradient of the output voltage-current relationship when the gate is logic LOW and there is no output current. The second value R_OL2 is the gradient of the output voltage-current relationship when the gate is logic LOW and the output current is I_OL. The default value is [ 30 800 ] Ω. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Logic LOW output current I_OL when shorted to Vcc

The resulting current when the gate is in the logic LOW state, but the load forces the output voltage to the supply voltage Vcc. The default value is -45 mA. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Propagation delay

Time it takes for the output to swing from LOW to HIGH or HIGH to LOW after the input logic levels change. The default value is 25 ns.

Protection diode on resistance

The gradient of the voltage-current relationship for the protection diodes when forward biased. The default value is 5 Ω. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Protection diode forward voltage

The voltage above which the protection diode is turned on. The default value is 0.6 V. This parameter is available when you select the Quadratic option for the Output current-voltage relationship parameter.

Initial Conditions Tab

Output initial state

Specify whether the initial output state of the block is High or Low. This parameter is used for both linear and quadratic output states, provided that the Propagation delay parameter is greater than zero and the Solver Configuration block does not have the Start simulation from steady state option selected. The default value is Low.

Ports

This block has the following ports:

S

Electrical input port corresponding to the set pin

R

Electrical input port corresponding to the reset pin

Q

Electrical output port corresponding to the output pin

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