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Model timer integrated circuit behaviorally


Integrated Circuits


The Timer block is a behavioral model of a timer integrated circuit such as the NE555.

The following figure shows the implementation structure.

The Potential divider component resistance parameter sets the values of the three resistors creating the potential divider. The two comparator inputs have infinite input resistance and zero input capacitance. The S-R Latch block provides the functionality of the set-reset latch. It includes an output capacitor and a resistor with values set to match the Propagation delay parameter value. The block models the output stage inverter using a CMOS NOT block. You define the output resistance, low-level output voltage, and high-level output voltage for the CMOS gate in the Timer block dialog box. The discharge switch approximates the NPN bipolar transistor on a real timer as a switch with defined switch on-resistance and off-resistance values.

Basic Assumptions and Limitations

This block has the following limitations:

  • The behavior is abstracted. Results are not as accurate as a transistor-level model.

  • Delay in response to changing inputs depends solely upon the RC time constant of the resistor-capacitor network at the output of the latch. In practice, the delay has a more complex dependency on the device structure. Set this value based on the output-pulse rise and fall times.

  • The drop in output voltage is a linear function of output current. In practice, the relationship is that of a bipolar transistor push-pull pair.

  • The controlled switch arrangement used by the block is an approximation of an open-collector arrangement.

  • The power supply connects internally within the component, and the block assumes that the GND pin is grounded.


Supply Tab

Power supply voltage

The voltage value Vcc that the block applies internally to the timer component. The default value is 15 V.

Outputs Tab

Low level output voltage

The output voltage when the timer output is low and no output current is drawn. The default value is 0 V.

High level output voltage

The output voltage VOH when the timer output is high and no current is drawn. The default value is 14.1 V.

Output resistance

The ratio of output voltage drop to output current. Set this parameter to (VOHVOH1)/IOH1, where VOH1 is the reduced output high voltage when the output current is IOH1. The default value is 8 Ω.

Propagation delay

Set this value to the input-pulse or output-pulse rise time. The default value is 1e-07 s.

Discharge Tab

Discharge switch on-resistance

A representative value is the discharge pin saturation voltage divided by the corresponding current. The default value is 12 Ω.

Discharge switch off-resistance

A representative value is the discharge pin leakage current divided by the corresponding pin voltage. The default value is 5e+08 Ω.

Potential Divider Tab

Potential divider component resistance

A typical value for a 555-type timer is 5 kΩ. You can measure it directly across the positive supply and control pins when the chip does not connect to a circuit. The default value is 5 kΩ.


This block has the following ports:


Electrical port corresponding to the threshold pin


Electrical port corresponding to the trigger pin


Electrical port corresponding to the control pin


Electrical port corresponding to the reset pin


Electrical port corresponding to the output pin


Electrical port corresponding to the discharge pin

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