Compute fundamental value of signal
Control and Measurements/Measurements
The Fundamental (PLL-Driven) block computes the fundamental value of the input 3 over a running window of one cycle of fundamental frequency given by input 1. The reference frame required for the computation is given by the input 2.
Based on the Fourier analysis of a periodic signal, the fundamental value of a signal f(t) can be expressed as
The magnitude and phase of the fundamental is calculated by
To resolve these equations, the block uses the input 1 (Freq) for f0 and input 2 (wt) for ω0t. These two input signals are normally connected to the outputs of a PLL block.
As this block uses a running average window, one cycle of simulation must complete before the outputs give the correct magnitude and angle. For the first cycle of simulation, the outputs are held to the values specified by the initial input parameter.
Specify the frequency of the first cycle of simulation.
Specify the minimum frequency value that sets the buffer size of the Variable Time Delay block used inside the block to compute the fundamental value.
Specify the initial magnitude and phase in degrees of the input signal.
Specify the sample time of the block, in seconds. Set to 0 to implement a continuous block.
Fundamental frequency (Hz) required by the computation. This input is normally connected to the output Freq of a PLL block.
Angle of the reference frame (rad/s) required for the computation. This input is normally connected to the output wt of a PLL block.
Connects to the signal to be analyzed. Typical input signals are voltages or currents measured by the Current Measurement or Voltage Measurement block.
Returns the magnitude of the fundamental in the same unit as the input signal.
Returns the phase of the fundamental, in degrees, relative to the reference frame wt (input 2).
|Sample Time||Specified in the Sample Time parameter|
Continuous if Sample Time = 0
|Scalar Expansion||Yes, of the parameters|
|Dimensionalized||Yes, for Input 3 (In)|
compares the Fourier block (with a specified fundamental frequency
of 60 Hz) output to the Fundamental (PLL-Driven) block output. The
PLL-Driven block outputs accurate magnitude and phase even if the
fundamental frequency of the input signal varies during the simulation.
The model sample time is parameterized by the Ts variable set to a default value of 50e-6 s. Set Ts to 0 in the command window to simulate the model in continuous mode.