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Cauer Thermal Model Element

Heat transfer through an individual layer of a semiconductor module

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Semiconductors / Fundamental Components / Thermal

Description

The Cauer Thermal Model Element block represents heat transfer through an individual layer of a semiconductor module. The figure shows an equivalent circuit for a Cauer Thermal Model Element block.

A Cauer thermal model represents the multiple layers that constitute the packaging of a semiconductor. Layers include chip, solder, substrate, solder, and base. Other terms that describe a Cauer thermal model are:

  • Continued fraction circuit

  • T model

  • Ladder network

To create a Cauer thermal model, connect multiple instances of the Cauer Thermal Model Element block in series. In the figure of the Cauer thermal model, Tj is the junction temperature and Tc is the base plate temperature.

The defining equations for the Cauer Thermal Model Element block are:

Cthermal=τRthermal,

QAB=TABRthermal,

and

QAR=CthermaldTARdt,

where:

  • Cthermal is the thermal capacity.

  • τ is the thermal time constant.

  • Rthermal is the thermal resistance.

  • QAB is the heat flow through the material.

  • TAB is the temperature difference between the material layers.

  • QAR is the heat flow through the thermal capacity.

  • TAR is the temperature drop across the thermal capacity.

Parameters

Parameters Tab

Thermal resistance

The default value for the thermal resistance, Rthermal, is 5e-3 K/W.

Thermal time constant

The default value for the thermal time constant, τ, is 0.1 s.

Variables Tab

Use the Variables tab to set the priority and initial target values for the block variables before simulation. For more information, see Set Priority and Initial Target for Block Variables (Simscape) .

Unlike block parameters, variables do not have conditional visibility. The Variables tab lists all the existing block variables. If a variable is not used in the set of equations corresponding to the selected block configuration, the values specified for this variable are ignored.

Ports

The block has the following ports:

A

Thermal conserving port associated with the first surface of the individual layer of the semiconductor.

R

Thermal conserving port associated with the chosen thermal reference.

B

Thermal conserving port associated with the second surface of the individual layer of the semiconductor.

References

[1] Schütze, T. AN2008-03: Thermal equivalent circuit models. Application Note. V1.0. Germany: Infineon Technologies AG, 2008.

Introduced in R2016a

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