Estimate three-phase sinusoidal characteristics using a phase-locked loop
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The Three-Phase Sinusoidal Measurement (PLL) block estimates the frequency characteristics of a balanced three-phase sinusoidal signal. The block uses a standard phase-locked loop (PLL) strategy to estimate the frequency and phase angle of the input signal. It also outputs the magnitude of the input signal.
Use this block in control applications when the frequency, phase angle, or magnitude are required and cannot be measured directly. To estimate the frequency characteristics of a non-three-phase or unbalanced sinusoidal signal, use the Sinusoidal Measurement (PLL) block instead.
The phase-locked loop generates a sinusoid that approximates the input signal u(t) with the form:
y is the estimate of the input signal.
A is the amplitude of the input signal.
ϕ0 is the initial phase angle of the input signal.
Because the input signal is assumed to be balanced, the block calculates the amplitude directly from the instantaneous amplitude of the three phases. The estimated phase angle ϕ is the angle of this generated sinusoid:
This diagram shows the overall structure of the phase-locked loop.
In the diagram:
The phase detector produces an error signal relative to the phase difference eϕ between the input sinusoid u and the synthesized sinusoid y. It also outputs the amplitude A.
The loop filter provides an estimate of the input angular frequency ω by filtering out the high-frequency components of the phase difference. The block also outputs the converted frequency f in Hz.
The voltage-controlled oscillator integrates the angular speed to produce the phase estimate ϕ which it sends to the Phase Detector for comparison.
abc— Input signal
Three-phase input signal.
Estimated frequency of the input signal, in Hz.
angle— Phase angle
Estimated phase angle of the first phase of the input signal, in rad.
Magnitude of the input signal.
Loop filter proportional gain— LF proportional gain
200(default) | positive scalar
Proportional gain for the loop filter. Increase this value to increase the rate at which steady-state error is eliminated in the phase angle. This value also determines the aggressiveness of the PLL in tracking and locking to the phase angle.
Loop filter integral gain— LF integral gain
2000(default) | positive scalar
Integral gain for the loop filter. This determines the aggressiveness of the PLL in tracking and locking to the phase. Increase this value to reduce and eliminate steady-state error in the phase angle.
Initial frequency (Hz)— Initial frequency
60 Hz(default) | scalar
Initial estimate of the input frequency.
Initial phase angle (rad)— Initial phase
0 rad(default) | scalar or vector
Initial estimate of the phase angle.
Sample time (-1 for inherited)— Block sample time
-1or positive number
Sample time for the block (-1 for inherited). Set this to
0 for continuous operation, or explicitly for
discrete operation. If you use this block inside a triggered subsystem, set
the sample time to -1. If you use this block in a continuous variable-step
model, you can specify the sample time explicitly.