Documentation

HDL Coder

HDL-optimized blocks

The HDL Coder library includes blocks from other block libraries with defaults set for HDL code generation. The HDL Operations library provides HDL-optimized blocks that model common hardware components. Use HDL Operations blocks and other blocks from the HDL Coder library to design and simulate systems intended for HDL code generation. If you have an HDL Coder™ license, you can generate HDL code from these systems. If you do not have an HDL Coder license, you can design and simulate with these blocks, but cannot generate HDL code.

  • Discrete
    Blocks in the Discrete library that are optimized for HDL Code generation
  • HDL Subsystems
    HDL blocks that specify synchronous reset and enable behavior
  • HDL Operations
    HDL blocks that support hardware components and improve achievable clock frequency on the target hardware.
  • HDL RAMs
    HDL blocks that map to RAM blocks on the target hardware
  • HDL Floating Point Operations
    HDL blocks that map to RAM blocks on the target hardware
  • Logic and Bit Operations
    Lookup Table blocks that are optimized for HDL Code generation
  • Lookup Tables
    Lookup Table blocks that are optimized for HDL Code generation
  • Sources
    Blocks to provide input to your system
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