Check Input Resolution

Check that input signal has specified resolution


Model Verification


The Check Input Resolution block checks whether the input signal has a specified scalar or vector resolution (see Resolution in Parameters). If the resolution is a scalar, the input signal must be a multiple of the resolution within a 10e-3 tolerance. If the resolution is a vector, the input signal must equal an element of the resolution vector. If the verification condition is true, the block does nothing. If not, the block halts the simulation, by default, and displays an error message.

The Check Input Resolution block and its companion blocks in the Model Verification library are intended to facilitate creation of self-validating models. For example, you can use model verification blocks to test that signals do not exceed specified limits during simulation. When you are satisfied that a model is correct, you can turn error checking off by disabling the verification blocks. You do not have to physically remove them from the model. If you need to modify a model, you can temporarily turn the verification blocks back on to ensure that your changes do not break the model.


For information about how Simulink® Coder™ generated code handles Model Verification blocks, see Debug (Simulink Coder).

Data Type Support

The Check Input Resolution block accepts input signals of data type double and of any dimension. If the input signal is nonscalar, the block checks the resolution of each element of the input test signal.

For more information, see Data Types Supported by Simulink in the Simulink documentation.



Specify the resolution that the input signal must have.

Enable assertion

Clearing this check box disables the Check Input Resolution block, that is, causes the model to behave as if the block did not exist. The Model Verification block enabling setting in the Configuration Parameters dialog box allows you to enable or disable all model verification blocks in a model, including Check Input Resolution blocks, regardless of the setting of this option.

Simulation callback when assertion fails

Specify a MATLAB® expression to evaluate when the assertion fails. Because the expression is evaluated in the MATLAB workspace, define all variables used in the expression in that workspace.

Stop simulation when assertion fails

Selecting this check box causes the Check Input Resolution block to halt the simulation when the block's output is zero and the Simulink software displays an error. Otherwise, the Simulink software displays a warning and continues the simulation.

Output assertion signal

Selecting this check box causes the Check Input Resolution block to output a Boolean signal that is true (1) at each time step if the assertion succeeds and false (0) if the assertion fails. The data type of the output signal is Boolean if you have selected the Implement logic signals as Boolean data check box on the Configuration Parameters dialog box. Otherwise the data type of the output signal is double.


Data Types


Sample Time

Inherited from driving block

Direct Feedthrough


Multidimensional Signals


Variable-Size Signals


Zero-Crossing Detection


Code Generation


Introduced before R2006a

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