Increase real world value of signal by one
Simulink / Additional Math & Discrete / Additional Math: Increment — Decrement
The Increment Real World block increases the real world value of the signal by one.
Overflows always wrap.
Port_1(y)— Calculated output signal
Output data type always matches input.
The code generator does not explicitly group primitive blocks that constitute a nonatomic masked subsystem block in the generated code. This flexibility allows for more efficient code generation. In certain cases, you can achieve grouping by configuring the masked subsystem block to execute as an atomic unit by selecting the Treat as atomic unit option.
This block has a single, default HDL architecture.
Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0.
See also ConstrainedOutputPipeline (HDL Coder).
Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0.
See also InputPipeline (HDL Coder).
Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0.
See also OutputPipeline (HDL Coder).