Output signal attributes, including width, dimensionality, sample time, and complex signal flag
The Probe block outputs selected information about the signal
on its input. The block can output the input signal's width, dimensionality,
sample time, and a flag indicating whether the input is a complex-valued
signal. The block has one input port. The number of output ports depends
on the information that you select for probing, that is, signal dimensionality,
sample time, and/or complex signal flag. Each probed value is output
as a separate signal on a separate output port. The block accepts
real or complex-valued signals of any built-in data type. It outputs
signals of type
double. During simulation, the
block icon displays the probed data.
The Probe block accepts signals of the following data types:
Enumerated (input only)
For more information, see Data Types Supported by Simulink in the Simulink® documentation.
You can use an array of buses as an input signal to a Probe block. For details about defining and using an array of buses, see Combine Buses into an Array of Buses.
Select to output the width, or number of elements, of the probed signal.
Select to output the sample time of the probed signal. The output is a two-element vector that specifies the period and offset of the sample time, respectively. See Specify Sample Time for more information.
Select to output 1 if the probed signal is complex; otherwise, 0.
Select to output the dimensions of the probed signal.
The Probe block ignores the Data type override setting of the Fixed-Point Tool.
Select the output data type for the width information.
Select the output data type for the sample time information.
Select the output data type for the complexity information.
Select the output data type for the dimensions information.
For Data type for width, Data
type for sample time, and Data type for signal
Boolean data type is
not supported. Furthermore, if you select
Same as input in
any of these drop-down lists, and the block’s input signal
data type is
Boolean, when you simulate your model,
you see an error.
shows how you can use the Probe block.
the Probe block determines the sample time of the input signal to
verify that it matches the assumed value of the design:
For more information, see the model description.
Double | Single | Boolean | Base Integer | Fixed-Point | Enumerated | Bus
Inherited from driving block