Delay signal one sample period
The Unit Delay block holds and delays its input by the sample period you specify. When placed in an iterator subsystem, it holds and delays its input by one iteration. This block is equivalent to the z-1 discrete-time operator. The block accepts one input and generates one output. Each signal can be scalar or vector. If the input is a vector, the block holds and delays all elements of the vector by the same sample period.
You specify the block output for the first sampling period with
the Initial conditions parameter. Careful selection
of this parameter can minimize unwanted output behavior. You specify
the time between samples with the Sample time parameter.
A setting of
-1 means the block inherits the Sample
The Unit Delay block errors out if you use it to create a transition between blocks operating at different sample rates. Use the Rate Transition block instead.
The Unit Delay, Memory, and Zero-Order Hold blocks provide similar functionality but have different capabilities. Also, the purpose of each block is different. The sections that follow highlight some of these differences.
|Block||Purpose of the Block||Reference Examples|
|Unit Delay||Implement a delay using a discrete sample time that you specify. The block accepts and outputs signals with a discrete sample time.|
|Memory||Implement a delay by one major integration time step. Ideally, the block accepts continuous (or fixed in minor time step) signals and outputs a signal that is fixed in minor time step.|
|Zero-Order Hold||Convert an input signal with a continuous sample time to an output signal with a discrete sample time.|
|Unit Delay||Memory||Zero-Order Hold|
|Specification of initial condition||Yes||Yes||No, because the block output at time t = 0 must match the input value.|
|Specification of sample time||Yes||No, because the block can only inherit sample time (from the driving block or the solver used for the entire model).||Yes|
|Support for frame-based signals||Yes||No||Yes|
|Support for state logging||Yes||No||No|
The Unit Delay block accepts real or complex signals of any data type that Simulink® supports, including fixed-point and enumerated data types. If the data type of the input signal is user-defined, the initial condition must be zero.
For more information, see Data Types Supported by Simulink in the Simulink documentation.
During simulation, the block uses the following values:
The initial value of the signal object to which the state name is resolved
Min and Max values of the signal object
For more information, see Discrete Block State Naming in Generated Code (Simulink Coder) in the Simulink Coder™ documentation.
Specify the output of the simulation for the first sampling period, during which the output of the Unit Delay block is otherwise undefined.
The Initial conditions parameter is converted from a double to the input data type offline using round-to-nearest and saturation.
Specify whether the Unit Delay block performs sample- or frame-based processing.
as channels (sample based)
Elements as channels (sample based)
Treat each element of the input as a separate channel (sample-based processing).
Columns as channels (frame based)
Treat each column of the input as a separate channel (frame-based processing).
Sets the block to inherit the processing mode from the input signal and delay the input accordingly. You can identify whether the input signal is sample or frame based by looking at the signal line. Simulink represents sample-based signals with a single line and frame-based signals with a double line.
When you choose the
for the Input processing parameter, and the input
signal is frame-based, Simulink® will generate a warning or
error in future releases.
Use Input processing to specify whether
the block performs sample- or frame-based processing. The block accepts
frame-based signals for the input
u. All other
input signals must be sample based.
|Input Signal u||Input Processing Mode||Block Works?|
|Sample based||Sample based||Yes|
|Frame based||No, produces an error|
|Sample based||Frame based||Yes|
For more information about these two processing modes, see Sample- and Frame-Based Concepts (DSP System Toolbox) in the DSP System Toolbox™ documentation.
Frame-based processing requires a DSP System Toolbox license.
Enter the discrete interval between sample time hits or specify
inherit the sample time.
By default, the block inherits its sample time based upon the context of the block within the model. To set a different sample time, enter a valid sample time based upon the table in Types of Sample Time.
See also Specify Sample Time in the online documentation for more information.
Use this parameter to assign a unique name to each state.
If left blank, no name is assigned.
A valid identifier starts with an alphabetic or underscore character, followed by alphanumeric or underscore characters.
The state name applies only to the selected block.
This parameter enables State name must resolve to Simulink signal object when you click the Apply button.
For more information, see Discrete Block State Naming in Generated Code (Simulink Coder).
|Type: character vector|
Require that state name resolve to Simulink signal object.
Require that state name resolve to Simulink signal object.
Do not require that state name resolve to Simulink signal object.
State name enables this parameter. This
parameter appears only if you set the model configuration parameter Signal
resolution to a value other than
Selecting this check box disables Code generation storage class.
|Type: character vector|
Choose a custom storage class package by selecting a signal
object class that the target package defines. For example, to apply
custom storage classes from the built-in package
mpt.Signal. Unless you use an ERT-based
code generation target with Embedded
Coder®, custom storage classes
do not affect the generated code.
To programmatically set this parameter, use
For examples and more information about storage classes, see Control Signals and States in Code by Applying Storage Classes (Simulink Coder). For information about custom storage classes, see Control Data Representation by Applying Custom Storage Classes (Embedded Coder).
Use custom storage classes from the built-in package
Use custom storage classes from the package that defines the class that you select.
If the class that you want does not appear in the list, select
class lists. For instructions, see Apply Custom Storage Classes Directly to Signal Lines, Block States, and Outport Blocks (Embedded Coder).
Select state storage class for code generation.
Auto is the appropriate storage class for
states that you do not need to interface to external code.
Applies the storage class or custom storage class that you select from the list. For information about storage classes, see Control Signals and States in Code by Applying Storage Classes (Simulink Coder). For information about custom storage classes, see Control Data Representation by Applying Custom Storage Classes (Embedded Coder).
Use Signal object class to select custom
storage classes from a package other than
State name enables this parameter.
TypeQualifier will be removed in a future release. To apply storage type qualifiers to data, use custom storage classes and memory sections. Unless you use an ERT-based code generation target with Embedded Coder, custom storage classes and memory sections do not affect the generated code.
Specify a storage type qualifier such as
' (empty character vector)
Setting Code generation storage class to
SimulinkGlobal enables this parameter.
This parameter is hidden unless you previously set its value.
|Parameter Name: |
|Value Type: character vector|
The Unit Delay block is a bus-capable block. The input can be a virtual or nonvirtual bus signal subject to the following restrictions:
Initial conditions must be zero, a nonzero scalar, or a finite numeric structure.
If Initial conditions is zero or a structure, and you specify a State name, the input cannot be a virtual bus.
If Initial conditions is a nonzero scalar, no State name can be specified.
For information about specifying an initial condition structure, see Specify Initial Conditions for Bus Signals.
All signals in a nonvirtual bus input to a Unit Delay block must have the same sample time, even if the elements of the associated bus object specify inherited sample times. You can use a Rate Transition block to change the sample time of an individual signal, or of all signals in a bus. See Specify Bus Signal Sample Times and Bus-Capable Blocks for more information.
You can use an array of buses as an input signal to a Unit Delay block. You can specify the Initial conditions parameter with:
0. In this case, all
of the individual signals in the array of buses use the initial value
An array of structures that specifies an initial condition for each of the individual signals in the array of buses.
A single scalar structure that specifies an initial condition for each of the elements that the bus type defines. Use this technique to specify the same initial conditions for each of the buses in the array.
For details about defining and using an array of buses, see Combine Buses into an Array of Buses.
For an example of how to use the Unit Delay block, see the
The Unit Delay block appears in the
Double | Single | Boolean | Base Integer | Fixed-Point | Enumerated | Bus
Specified in the Sample time parameter