Delay signal one sample period, if external enable signal is on
Additional Math & Discrete / Additional Discrete
The Unit Delay Enabled block delays a signal by one sample period
when the external enable signal
E is on. While
the enable is off, the block is disabled. It holds the current state
at the same value and outputs that value. The enable signal is on
E is not 0, and off when
You specify the block output for the first sampling period with the value of the Initial condition parameter.
You specify the time between samples with the Sample
time parameter. A setting of
that the block inherits the Sample time.
The Unit Delay Enabled block accepts signals of the following data types:
The output has the same data type as the input
For enumerated signals, the Initial condition must
be of the same enumerated type as the input
For more information, see Data Types Supported by Simulink in the Simulink® documentation.
Specify the initial output of the simulation.
Specify the time interval between samples. To inherit the sample
time, set this parameter to
-1. See Specify Sample Time in
the online documentation for more information.
Double | Single | Boolean | Base Integer | Fixed-Point | Enumerated
Specified in the Sample time parameter
Unit Delay, Unit Delay Enabled External IC, Unit Delay Enabled Resettable, Unit Delay Enabled Resettable External IC, Unit Delay External IC, Unit Delay Resettable, Unit Delay Resettable External IC, Unit Delay With Preview Enabled, Unit Delay With Preview Enabled Resettable, Unit Delay With Preview Enabled Resettable External RV, Unit Delay With Preview Resettable, Unit Delay With Preview Resettable External RV