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Unit Delay Enabled External IC

Delay signal one sample period, if external enable signal is on, with external initial condition

Library

Additional Math & Discrete / Additional Discrete

Description

The Unit Delay Enabled External IC block delays a signal by one sample period when the enable signal E is on. While the enable is off, the block holds the current state at the same value and outputs that value. The enable E is on when E is not 0, and off when E is 0.

The initial condition of this block is given by the signal IC.

You specify the time between samples with the Sample time parameter. A setting of -1 means the block inherits the Sample time.

Data Type Support

The Unit Delay Enabled External IC block accepts signals of the following data types:

  • Floating point

  • Built-in integer

  • Fixed point

  • Boolean

The data types of the inputs u and IC must be the same. The output has the same data type as u and IC.

For more information, see Data Types Supported by Simulink in the Simulink® documentation.

Parameters and Dialog Box

Sample time

Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See Specify Sample Time in the online documentation for more information.

Characteristics

Direct Feedthrough

Yes, of the reset input port

No, of the enable input port

Yes, of the external IC port

Sample Time

Specified in the Sample time parameter

Scalar Expansion

Yes

Zero-Crossing Detection

No

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