An enabled subsystem has a single control input, which can be a scalar or a vector.
If the input is a scalar, the subsystem executes if the input value is greater than zero.
If the input is a vector, the subsystem executes if any one of the vector elements is greater than zero.
For example, if the control input signal is a sine wave, the subsystem is alternately enabled and disabled. This behavior is shown in the following figure, where an up arrow signifies enable and a down arrow disable.
The Simulink® software uses the zero-crossing slope method to determine whether an enable event is to occur. If the signal crosses zero and its slope is positive, then the subsystem becomes enabled. If the slope is negative at the zero crossing, then the subsystem becomes disabled. Note that a subsystem is only enabled or disabled at major time steps. Therefore, if zero-crossing detection is turned off and the signal crosses zero during a minor time step, then the subsystem will not become enabled (or disabled) until the next major time step.
You create an enabled subsystem by copying an Enable block from the Ports & Subsystems library into a Subsystem block. An enable symbol and an enable control input port is added to the Subsystem block.
To set the initial conditions for an Outport block in an enabled subsystem, see Specify or Inherit Conditional Subsystem Initial Values.
cause the states to revert to their initial conditions. However, enabled
subsystems reset their states on enabling only if they are disabled
for at least one time step. To reset the states of your subsystem
without disabling its execution, use resettable subsystems. For more
information, see Comparison of Resettable Subsystems and Enabled Subsystems.
In simplified initialization mode, the subsystem elapsed time is always reset during the first execution after becoming enabled, whether or not the subsystem is configured to reset on enable. For more information on simplified initialization mode, see Underspecified initialization detection.
Note: For nested subsystems whose Enable blocks have different parameter settings, the settings on the child subsystem's dialog box override those inherited from the parent subsystem.
This feature allows you to pass the control signal down into the enabled subsystem, which can be useful where logic within the enabled subsystem is dependent on the value or values contained in the control signal.
An enabled subsystem can contain any block, whether continuous or discrete. Discrete blocks in an enabled subsystem execute only when the subsystem executes, and only when their sample times are synchronized with the simulation sample time. Enabled subsystems and the model use a common clock.
Enabled subsystems can contain Goto blocks. However,
only state ports can connect to Goto blocks in an enabled
subsystem. In the
For example, this system contains four discrete blocks and a control signal. The discrete blocks are:
Block A, which has a sample time of 0.25 second
Block B, which has a sample time of 0.5 second
Block C, within the enabled subsystem, which has a sample time of 0.125 second
Block D, also within the enabled subsystem, which has a sample time of 0.25 second
The enable control signal is generated by a Pulse Generator block, labeled Signal E, which changes from 0 to 1 at 0.375 second and returns to 0 at 0.875 second.
The chart below indicates when the discrete blocks execute.
Blocks A and B execute independently of the enable control signal because they are not part of the enabled subsystem. When the enable control signal becomes positive, blocks C and D execute at their assigned sample rates until the enable control signal becomes zero again. Note that block C does not execute at 0.875 second when the enable control signal changes to zero.
Certain restrictions apply when you connect blocks with constant sample times (see Constant Sample Time) to the output port of a conditional subsystem.
An error appears when you connect a Model or S-Function block with constant sample time to the output port of a conditional subsystem.
The sample time of any built-in block with a constant sample time is converted to a different sample time, such as the fastest discrete rate in the conditional subsystem.
To avoid the error or conversion, either manually change the sample time of the block to a non-constant sample time or use a Signal Conversion block. The example below shows how to use the Signal Conversion block to avoid these errors.
Consider the following model
The two Constant blocks in this model have constant sample times. When you simulate the model, the Simulink software converts the sample time of the Constant block inside the enabled subsystem to the rate of the Pulse Generator. If you simulate the model with sample time colors displayed (see View Sample Time Information), the Pulse Generator and Enabled Subsystem blocks are colored red. However, the Constant and Outport blocks outside of the enabled subsystem are colored magenta, indicating that these blocks still have a constant sample time.
Suppose the model above is referenced from a Model block inside an enabled subsystem, as shown below. (See Model Referencing.)
An error appears when you try to simulate the top model, indicating that the second output of the Model block may not be wired directly to the enabled subsystem output port because it has a constant sample time. (See Model Referencing.)
To avoid this error, insert a Signal Conversion block between the second output of the Model block and the Outport block of the enabled subsystem.
This model simulates with no errors. With sample time colors displayed, the Model and Enabled Subsystem blocks are colored yellow, indicating that these are hybrid systems. In this case, the systems are hybrid because they contain multiple sample times.